11/10/2005Comp 120 Fall 20051 November 10 8 classes to go! Email questions to me –Topics you would like covered –Things you don’t understand –Suggestions.

Slides:



Advertisements
Similar presentations
1998 Morgan Kaufmann Publishers Mario Côrtes - MO401 - IC/Unicamp- 2004s2 Ch7b-1 Chapter Seven Sistemas de Memória parte B Memória Virtual.
Advertisements

1 Lecture 13: Cache and Virtual Memroy Review Cache optimization approaches, cache miss classification, Adapted from UCB CS252 S01.
Virtual Memory. The Limits of Physical Addressing CPU Memory A0-A31 D0-D31 “Physical addresses” of memory locations Data All programs share one address.
Virtual Memory Chapter 18 S. Dandamudi To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S. Dandamudi.
May 7, A Real Problem  What if you wanted to run a program that needs more memory than you have?
Lecture 34: Chapter 5 Today’s topic –Virtual Memories 1.
1 A Real Problem  What if you wanted to run a program that needs more memory than you have?
Caching IV Andreas Klappenecker CPSC321 Computer Architecture.
Cs 325 virtualmemory.1 Accessing Caches in Virtual Memory Environment.
The Memory Hierarchy (Lectures #24) ECE 445 – Computer Organization The slides included herein were taken from the materials accompanying Computer Organization.
1 Lecture 20: Cache Hierarchies, Virtual Memory Today’s topics:  Cache hierarchies  Virtual memory Reminder:  Assignment 8 will be posted soon (due.
CSCE 212 Chapter 7 Memory Hierarchy Instructor: Jason D. Bakos.
1 Lecture 20 – Caching and Virtual Memory  2004 Morgan Kaufmann Publishers Lecture 20 Caches and Virtual Memory.
S.1 Review: The Memory Hierarchy Increasing distance from the processor in access time L1$ L2$ Main Memory Secondary Memory Processor (Relative) size of.
Computer ArchitectureFall 2008 © CS : Computer Architecture Lecture 22 Virtual Memory (1) November 6, 2008 Nael Abu-Ghazaleh.
1  1998 Morgan Kaufmann Publishers Chapter Seven Large and Fast: Exploiting Memory Hierarchy.
Review CPSC 321 Andreas Klappenecker Announcements Tuesday, November 30, midterm exam.
1 Chapter Seven Large and Fast: Exploiting Memory Hierarchy.
The Memory Hierarchy II CPSC 321 Andreas Klappenecker.
Technical University of Lodz Department of Microelectronics and Computer Science Elements of high performance microprocessor architecture Virtual memory.
1  1998 Morgan Kaufmann Publishers Chapter Seven Large and Fast: Exploiting Memory Hierarchy.
©UCB CS 162 Ch 7: Virtual Memory LECTURE 13 Instructor: L.N. Bhuyan
1  2004 Morgan Kaufmann Publishers Chapter Seven.
1 SRAM: –value is stored on a pair of inverting gates –very fast but takes up more space than DRAM (4 to 6 transistors) DRAM: –value is stored as a charge.
1  1998 Morgan Kaufmann Publishers Chapter Seven Large and Fast: Exploiting Memory Hierarchy (Part II)
CS61C L37 VM III (1)Garcia, Fall 2004 © UCB Lecturer PSOE Dan Garcia inst.eecs.berkeley.edu/~cs61c CS61C : Machine Structures.
1 CSE SUNY New Paltz Chapter Seven Exploiting Memory Hierarchy.
Lecture 33: Chapter 5 Today’s topic –Cache Replacement Algorithms –Multi-level Caches –Virtual Memories 1.
Lecture 19: Virtual Memory
Lecture 15: Virtual Memory EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer Engineering Spring 2014, Dr.
CPE432 Chapter 5A.1Dr. W. Abu-Sufah, UJ Chapter 5B:Virtual Memory Adapted from Slides by Prof. Mary Jane Irwin, Penn State University Read Section 5.4,
1  2004 Morgan Kaufmann Publishers Multilevel cache Used to reduce miss penalty to main memory First level designed –to reduce hit time –to be of small.
July 30, 2001Systems Architecture II1 Systems Architecture II (CS ) Lecture 8: Exploiting Memory Hierarchy: Virtual Memory * Jeremy R. Johnson Monday.
The Memory Hierarchy 21/05/2009Lecture 32_CA&O_Engr Umbreen Sabir.
IT253: Computer Organization
VICTORIA UNIVERSITY OF WELLINGTON Te Whare Wananga o te Upoko o te Ika a Maui COMP 203 / NWEN 201 Computer Organisation / Computer Architectures Virtual.
1 Virtual Memory Main memory can act as a cache for the secondary storage (disk) Advantages: –illusion of having more physical memory –program relocation.
1  1998 Morgan Kaufmann Publishers Recap: Memory Hierarchy of a Modern Computer System By taking advantage of the principle of locality: –Present the.
Virtual Memory. Virtual Memory: Topics Why virtual memory? Virtual to physical address translation Page Table Translation Lookaside Buffer (TLB)
Review (1/2) °Caches are NOT mandatory: Processor performs arithmetic Memory stores data Caches simply make data transfers go faster °Each level of memory.
1 Some Real Problem  What if a program needs more memory than the machine has? —even if individual programs fit in memory, how can we run multiple programs?
Computer Organization CS224 Fall 2012 Lessons 45 & 46.
Multilevel Caches Microprocessors are getting faster and including a small high speed cache on the same chip.
1 Chapter Seven CACHE MEMORY AND VIRTUAL MEMORY. 2 SRAM: –value is stored on a pair of inverting gates –very fast but takes up more space than DRAM (4.
1  2004 Morgan Kaufmann Publishers Chapter Seven Memory Hierarchy-3 by Patterson.
1  1998 Morgan Kaufmann Publishers Chapter Seven.
1  2004 Morgan Kaufmann Publishers Locality A principle that makes having a memory hierarchy a good idea If an item is referenced, temporal locality:
Virtual Memory Review Goal: give illusion of a large memory Allow many processes to share single memory Strategy Break physical memory up into blocks (pages)
LECTURE 12 Virtual Memory. VIRTUAL MEMORY Just as a cache can provide fast, easy access to recently-used code and data, main memory acts as a “cache”
Summary of caches: The Principle of Locality: –Program likely to access a relatively small portion of the address space at any instant of time. Temporal.
1 Chapter Seven. 2 SRAM: –value is stored on a pair of inverting gates –very fast but takes up more space than DRAM (4 to 6 transistors) DRAM: –value.
High Performance Computing1 High Performance Computing (CS 680) Lecture 2a: Overview of High Performance Processors * Jeremy R. Johnson *This lecture was.
CS203 – Advanced Computer Architecture Virtual Memory.
Memory Management memory hierarchy programs exhibit locality of reference - non-uniform reference patterns temporal locality - a program that references.
CS161 – Design and Architecture of Computer
ECE232: Hardware Organization and Design
Memory COMPUTER ARCHITECTURE
CS161 – Design and Architecture of Computer
Lecture 12 Virtual Memory.
Virtual Memory Use main memory as a “cache” for secondary (disk) storage Managed jointly by CPU hardware and the operating system (OS) Programs share main.
Some Real Problem What if a program needs more memory than the machine has? even if individual programs fit in memory, how can we run multiple programs?
Morgan Kaufmann Publishers
Virtual Memory Main memory can act as a cache for the secondary storage (disk) Advantages: illusion of having more physical memory program relocation protection.
Lecture 14 Virtual Memory and the Alpha Memory Hierarchy
Part V Memory System Design
Virtual Memory 4 classes to go! Today: Virtual Memory.
Lecture 23: Cache, Memory, Virtual Memory
Lecture 22: Cache Hierarchies, Memory
Lecture 15: Memory Design
Cache Structure Replacement policies Overhead Implementation
Presentation transcript:

11/10/2005Comp 120 Fall November 10 8 classes to go! questions to me –Topics you would like covered –Things you don’t understand –Suggestions for Final Exam questions Today: Virtual Memory

11/10/2005Comp 120 Fall Virtual Memory Main memory is a CACHE for disk Advantages: illusion of having more physical memory program relocation protection

11/10/2005Comp 120 Fall Pages: Virtual Memory Blocks Page faults: the data is not in memory, retrieve it from disk –huge miss penalty (remember 10 months at human scale) Pages should be fairly large (e.g., 4KB) Find something else to do while waiting –reducing page faults is important (LRU is worth the price) –can handle the faults in software instead of hardware –using write-through is too expensive so we use writeback

11/10/2005Comp 120 Fall Page Tables

11/10/2005Comp 120 Fall Page Tables One page table per process!

11/10/2005Comp 120 Fall Where are the page tables? Page tables are potentially BIG –4kB page, 4MB program, 1k page table entries per program! Powerpoint 18MB GBMail 32MB SpamFilter 48MB mySQL 40MB iCalMinder 5MB iCal 9MB Explorer 20MB 40 More Processes! –Page the page tables! –Have to look up EVERY address!

11/10/2005Comp 120 Fall Making Address Translation Fast TLB = Translation Lookaside Buffer a CACHE for address translation

11/10/2005Comp 120 Fall What is in the page table? Address = upper bits of physical memory address OR disk address of page if not in memory Valid = bit, set if page is in memory Use = bit, set when page is accessed Protection = bit (or bits) to specify access permissions Dirty = bit, set if page has been written

11/10/2005Comp 120 Fall Integrating TLB and Cache

11/10/2005Comp 120 Fall Program Relocation? We want to run multiple programs on our computer “simultaneously” To start a new program Without Virtual Memory: We have to modify all the address references to correspond to the range chosen. This is “relocation”. With Virtual Memory: EVERY program can pretend that it has ALL of memory. TEXT segment always starts at 0, STACK always resides a some huge high address (0xfffffff0)

11/10/2005Comp 120 Fall Protection? We’d like to protect one program from the errors of another Without Virtual Memory (old Macs, win3-) One program goes bad (or the programmer makes a mistake) and kills another program or the whole system! With Virtual Memory (new Macs, win95+) Every program is isolated from every other. You can’t even NAME the addresses in another program. Each page can have read, write, and execute permissions

11/10/2005Comp 120 Fall Some Issues Processor speeds continue to increase — much faster than either DRAM or disk access times Design challenge: dealing with this growing disparity Trends: –synchronous SRAMs (provide a burst of data) –redesign DRAM chips to provide higher bandwidth or processing –restructure code to increase locality –use prefetching (make cache visible to ISA)

11/10/2005Comp 120 Fall What these things have in common Question 1: Where can a block be placed? Question 2: How is a block found? Question 3: Which block should be replaced on a cache miss? Question 4: What happens on a write?

11/10/2005Comp 120 Fall Where can a block be placed? Direct Mapped Cache: only 1 place for any block (many blocks map to the same place) 2-Way Set Associative: 2 places for any block 4-Way Set Associative: 4 places for any block Fully Associative: anywhere Virtual Memory: anywhere

11/10/2005Comp 120 Fall How is a block found? Direct mapped cache: compute the index Set associative cache: compute the index, then search Fully associative cache: search all cache entries Virtual memory: separate lookup table

11/10/2005Comp 120 Fall Which block is replaced on miss? Direct mapped cache have no choice Others can use: –Random replacement –Least Recently Used (LRU) –Other schemes

11/10/2005Comp 120 Fall What happens on write? Write-through: write to both the cache and the next lower level Write-back: write only to the cache, remember that we have to write to the lower level on replacement

11/10/2005Comp 120 Fall Misses Compulsory misses Capacity misses Conflict misses

11/10/2005Comp 120 Fall Classes to go 7