© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Program design and analysis zSoftware modem.

Slides:



Advertisements
Similar presentations
Controller Tests Stephen Kaye Controller Test Motivation Testing the controller before the next generation helps to shake out any remaining.
Advertisements

© 2008 Wayne Wolf Overheads for Computers as Components 2nd ed. CPUs CPU performance CPU power consumption. 1.
Programmable Interval Timer
1 Copyright © 2013 Elsevier Inc. All rights reserved. Chapter 5 Program Design and Analysis.
Lecture 51 The Telephone System. Lecture 52 The Telephone System The modern telephone system draws from these Electrical Engineering subdisciplines: Signal.
© 2008 Wayne Wolf Overheads for Computers as Components 2nd ed. Processes and operating systems Telephone answering machine. 1.
© 2000 Morgan Kaufman Overheads for Computers as Components Processes and operating systems zTelephone answering machine.
FREQUENCY SHIFT KEYING
Senior Capstone Project Integration of Matlab Tools for DSP Code Generation ECE Department March 2nd, 2006 Team Members: Kwadwo Boateng and Charles Badu.
Software Defined Radio Testbed Team may11-18 Members: Alex Dolan, Mohammad Khan, Ahmet Unsal Adviser: Dr. Aditya Ramamoorthy.
Introduction to D/A and A/D conversion Professor: Dr. Miguel Alonso Jr.
Page 1 Aalborg University Communication system for the AAUSAT-II Communication System for the AAUSAT-II Kresten K. Sørensen Department.
MEMORY ORGANIZATION Memory Hierarchy Main Memory Auxiliary Memory
RADIO FREQUENCY MODULE. Introduction  An RF module is a small electronic circuit used to transmit and receive radio signals.  As the name suggests,
© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. CPUs zExample: data compressor.
USB: Data Flow Sukesh Shenoy. USB implementation areas.
Digital Data Transmission ECE 457 Spring Information Representation Communication systems convert information into a form suitable for transmission.
1 Project supervised by: Dr Michael Gandelsman Project performed by: Roman Paleria, Avi Yona 12/5/2003 Multi-channel Data Acquisition System Mid-Term Presentation.
3F4 Data Transmission Introduction
High Speed Digital Systems Lab Spring/Winter 2010 Part A final presentation Instructor: Rolf Hilgendorf Students: Elad Mor, Ilya Zavolsky Integration of.
DSP for Software Radio Waveform Processing – Single Carrier Systems Dr. Jamil Ahmad.
INPUT/OUTPUT ARCHITECTURE By Truc Truong. Input Devices Keyboard Keyboard Mouse Mouse Scanner Scanner CD-Rom CD-Rom Game Controller Game Controller.
DARPA Digital Audio Receiver, Processor and Amplifier Group Z James Cotton Bobak Nazer Ryan Verret.
המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל Technion - Israel institute of technology.
Hardware Design of High Speed Switch Fabric IC. Overall Architecture.
© 2000 Morgan Kaufman Overheads for Computers as Components Program design and analysis zDesigning embedded programs is more difficult and challenging.
NAME – vivek singh. Class – VIII. WHAT IS COMPUTER ? A COMPUTER IS AN ELECTRONIC MACHINE. THAT CONVERT DATA INTO MEANINGFUL INFORMATION. IT CALCULATED.
Chapter-4/5-1CS331- Fakhry Khellah Term 081 Chapter 4 (Only 4.2 – 4.3) Digital Transmission.
Three fundamental concepts in computer security: Reference Monitors: An access control concept that refers to an abstract machine that mediates all accesses.
Emergency Mine Radio Daniel Weller, Adam Jozwick, David West.
Data Acquisition Systems
Bits, Bytes, Words Digital signal. Digital Signals The amplitude of a digital signal varies between a logical “0” and logical “1”. – The information in.
How to count PMT pulses Victor Kornilov Sternberg astronomical institute I count photons 25 years.
Scott Baker Will Cross Belinda Frieri March 9 th, 2005 Serial Communication Overview ME4447/6405.
© 2008 Wayne Wolf Overheads for Computers as Components 2nd ed. Program design and analysis Software components. Representations of programs. Assembly.
Wireless Communication with GNU SDR. A simplified wireless communication scheme.
ECS 152A 4. Communications Techniques. Asynchronous and Synchronous Transmission Timing problems require a mechanism to synchronize the transmitter and.
SEQUENTIAL CIRCUITS Component Design and Use. Register with Parallel Load  Register: Group of Flip-Flops  Ex: D Flip-Flops  Holds a Word of Data 
Hosted by Andrew Benson Choice1Choice 2Choice 3Choice
EECB 473 DATA NETWORK ARCHITECTURE AND ELECTRONICS PREPARED BY JEHANA ERMY JAMALUDDIN Basic Packet Processing: Algorithms and Data Structures.
ECE 448: Lab 6 DSP and FPGA Embedded Resources (Digital Downconverter)
Introduction Advantage of DSP: - Better signal quality & repeatable performance - Flexible  Easily modified (Software Base) - Handle more complex processing.
© 2008 Wayne Wolf Overheads for Computers as Components 2nd ed. Bus-Based Computer Systems Example: alarm clock 1.
Accessing I/O Devices Processor Memory BUS I/O Device 1 I/O Device 2.
ECE 5525 Osama Saraireh Fall 2005 Dr. Veton Kepuska
Additive White Gaussian Noise
1 Kyung Hee University Chapter 8 ARP(Address Resolution Protocol)
1 Transmission of Digital Data : Interface and Modems.
Code Converters, Multiplexers and Demultiplexers
© 2008, Renesas Technology America, Inc., All Rights Reserved 1 Course Introduction Purpose  This course provides an overview of the Digital-to-Analog.
A Mini Stereo Digital Audio Processor Design DINESH GUNDU VIGNESH SABARINATH.
Modeling a Multicarrier Wireless Communication Transceiver Embedded Software Systems Literature Survey March 24,2004 By Hunaid Lotia.
Chapter 7 Speech Recognition Framework  7.1 The main form and application of speech recognition  7.2 The main factors of speech recognition  7.3 The.
Members:Ahmet Unsal Alex Dolan Mohammad Khan Adviser:Prof. Aditya Ramamoorthy.
8251 USART.
A Wireless Local Area Network by Raymond Woodward.
Chapter 8 ARP(Address Resolution Protocol)
Vocoders.
Chapter 3 Sampling.
Introduction to Microprocessors and Microcontrollers
Chapter 10. Digital Signals
Topics Introduction Hardware and Software How Computers Store Data
Chapter 1: How are computers organized?
Overheads for Computers as Components 2nd ed.
Processes and operating systems
Processes and operating systems
Digital Signal Processing
 Is a machine that is able to take information (input), do some work on (process), and to make new information (output) COMPUTER.
Internal components of a computer.
Multichannel Link Path Analysis
Presentation transcript:

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Program design and analysis zSoftware modem.

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Theory of operation zFrequency-shift keying: yseparate frequencies for 0 and 1. time 0 1

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. FSK encoding zGenerate waveforms based on current bit: bit-controlled waveform generator

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. FSK decoding A/D converter zero filter one filter detector 0 bit detector 1 bit

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Transmission scheme zSend data in 8-bit bytes. Arbitrary spacing between bytes. zByte starts with 0 start bit. zReceiver measures length of start bit to synchronize itself to remaining 8 bits. start (0)bit 1bit 2bit 3bit 8...

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Requirements

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Specification Line-in* input() Receiver sample-in() bit-out() 11 Transmitter bit-in() sample-out() Line-out* output() 11

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. System architecture zInterrupt handlers for samples: yinput and output. zTransmitter. zReceiver.

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Transmitter zWaveform generation by table lookup. yfloat sine_wave[N_SAMP] = { 0.0, 0.5, 0.866, 1, 0.866, 0.5, 0.0, -0.5, , -1.0, , -0.5, 0}; time

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Receiver zFilters (FIR for simplicity) use circular buffers to hold data. zTimer measures bit length. zState machine recognizes start bits, data bits.

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Hardware platform zCPU. zA/D converter. zD/A converter. zTimer.

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Component design and testing zEasy to test transmitter and receiver on host. zTransmitter can be verified with speaker outputs. zReceiver verification tasks: ystart bit recognition; ydata bit recognition.

© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. System integration and testing zUse loopback mode to test components against each other. yLoopback in software or by connecting D/A and A/D converters.