STARLight PDR 3 Oct ‘01H.1 Miller STARLight Sensor Signal Processing Ryan Miller STARLight Electrical Engineer (734)

STARLight PDR 3 Oct ‘01H.2 Miller STARLight Overview Sensor Requirements Signal Processing Chain Overview Sampling Digital Signal Processing Data Formatting and Rates Hardware Overview Power Summary

STARLight PDR 3 Oct ‘01H.3 Miller STARLight Sensor Requirements Sample GHz, band-limited signals – < 20 ps sample to sample jitter – < 6.7 ns channel to channel sample skew – 3-bit digitization Digitally filter the data to ease requirements on analog filter Recover the Inphase and Quadrature components of each of the 10 signals Calculate digitization statistics for each ADC Allow gain/offset adjustment for each ADC to optimize 3-bit conversion Monitor critical receiver temperatures Provide thermal control electronics

STARLight PDR 3 Oct ‘01H.4 Miller STARLight System Block Diagram

STARLight PDR 3 Oct ‘01H.5 Miller STARLight Signal Processing Chain

STARLight PDR 3 Oct ‘01H.6 Miller STARLight Sampling Minimum sample rate (Fs) is 2 times bandwidth Bandwidth must include the analog Pre-Sample Filter ‘skirts’ Sample rate must be selected so that sampled data is aliased to Fs/4 for quadrature demodulation Since the Band Definition Filter is digital, would like to relax the analog Pre-Sample Filter specification – Wider Bandwidth – Gentler Roll-off/Fewer Poles

STARLight PDR 3 Oct ‘01H.7 Miller STARLight Sample Rate Calculations

STARLight PDR 3 Oct ‘01H.8 Miller STARLight Possible Sample Rates Nyquist Sample Rate = 72 MHz Fs/4 = F0/(2M-1) Minimum sample rate = 73.4 MHz – Fs/4 = MHz – Pre-Sample Filter BW limited to 36.7 MHz Desired sample rate = MHz – Fs/4 = 25.7 MHz – Pre-Sample Filter BW can be 51 MHz – After digital filtering and Quadrature Demod, can decimate by a factor of 2

STARLight PDR 3 Oct ‘01H.9 Miller STARLight Results of Sampling at MHz

STARLight PDR 3 Oct ‘01H.10 Miller STARLight The Next Step… Digital Filter before Quadrature Demodulation – PRO: Only need 10 filters – CON: Must operate at 100+ MHz Filter must be band-pass Quadrature Demodulation before Digital Filter – PRO: Reduces data rate by factor of 2 Digital Filter becomes low-pass Quadrature Demod includes FIRs – might be able to combine – CON: Need 20 digital filters

STARLight PDR 3 Oct ‘01H.11 Miller STARLight Digital Filtering then Quad Demod. Reduced hardware complexity – Fewer filters = less hardware – Band-pass FIR may require more stages, but not twice as many Speed – Depends on FPGA specifications and implementation – I/O is spec’d at 300 MHz – Implementation is flexible, Transposed form FIR relies on fast adders – Xilnx FPGAs have built in adder support – 64-bit ADD spec’d at 150 MHz

STARLight PDR 3 Oct ‘01H.12 Miller STARLight Digital Filtering First Define the final signal bandwidth using a digital filter – Allows identical filters to be used on all channels – Allows some relaxation of analog Pre-Sample Filter and minimizes channel to channel matching requirements Requires at least 30 stage bandpass FIR For 30 Stage, 16-bit (approx.): – 30*16+30*3 = 570 Registers/Filter – 10 Filters require 5700 registers – Xilinx XCV600 has over 15,000 registers

STARLight PDR 3 Oct ‘01H.13 Miller STARLight Transposed Form FIR Filter Samples go to all taps simultaneously Tap coefficient multiplies implemented with lookups All adders are 2-input: Reduces cascading, increases speed

STARLight PDR 3 Oct ‘01H.14 Miller STARLight Matlab Designed Quantized FIR Used Matlab Filter Design Toolbox Designed for quantized 10-bit coefficients Sample filter design with 31 taps Filter is symmetric Filter is linear phase Can save hardware since half the coefficients are zero

STARLight PDR 3 Oct ‘01H.15 Miller STARLight Quantized Filter Response

STARLight PDR 3 Oct ‘01H.16 Miller STARLight Quadrature Demodulation Mix digitized signal with sine and cosine (0,1,0,-1,…) Filter the results Produces the Inphase and Quadrature components Each component is at half the sample rate

STARLight PDR 3 Oct ‘01H.17 Miller STARLight I & Q Recovery Implementation The mixing operation is combined with the FIR operation and replaced with a multiplexor The Inphase channel is simply delayed The Quadrature channel is filtered with a simplified Hilbert Transform FIR (90° phase shift)

STARLight PDR 3 Oct ‘01H.18 Miller STARLight Sampling Summary Resulting 12 MHz bandwidth of I and Q channels requires only 24 MHz Sample rate per channel (25.7 MHz)

STARLight PDR 3 Oct ‘01H.19 Miller STARLight Other Sensor Functions Channel Totalizing Counters – 7 counters for each channel – Count occurrences of each binary value over the integration period Housekeeping Data Collection – Up to 6 receiver temperature monitors Thermal Control – PWM plus drive electronics for heater in each receiver

STARLight PDR 3 Oct ‘01H.20 Miller STARLight Sensor Data Rates 73.4 MHz sampling – Raw bit rate: 10 channels *3 bits * 73.4 MHz = 2.2 Gbps – After I/Q Demod: 20 channels *3 bits * 36.7 MHz = 2.2 Gbps MHz sampling – Raw bit rate: 10 channels *3 bits * MHz = 3.1 Gbps – After I/Q Demod: 20 channels *3 bits * 25.7 MHz = 1.5 Gbps Totalizer Output (one second integration) – 10 channels * 7 bins/channel * 29 bits per bin = 2030 bits/sec Temperature Data – 10 channels * 6 temps/channel * 16 bits/temp = 960 bits/sec

STARLight PDR 3 Oct ‘01H.21 Miller STARLight Hardware Overview

STARLight PDR 3 Oct ‘01H.22 Miller STARLight Sensor Data Acquisition

STARLight PDR 3 Oct ‘01H.23 Miller STARLight A/D Converter Comparison

STARLight PDR 3 Oct ‘01H.24 Miller STARLight SPT 7610 A/D Selected Power – Lowest power of the 3 available Package – Flat-pack package – Maxim only available in Ball-Grid Array Package Temperature Range – Available in Industrial Temp. Range (-40 to +85C) – Maxim only available in Commercial Temp. Range (0 to 70C) Availability – Parts in-house – Atmel: $ ea, Minimum order of 4, 16-week lead time

STARLight PDR 3 Oct ‘01H.25 Miller STARLight Sensor Control Board

STARLight PDR 3 Oct ‘01H.26 Miller STARLight Sensor Housekeeping Data Acquisition Low-speed 16-bit A/D Converter Interface electronics for up to 6 thermistors Reference electronics to improve accuracy Low-speed data will be time-tagged and read on demand by the Control Computer through the Status and Control Interface

STARLight PDR 3 Oct ‘01H.27 Miller STARLight Sensor Power Summary Sensor Data Acquisition Board (x 10 boards, not including Receiver) – 7.0 Watts Maximum – 5.4 Watts Typical Sensor Control Board: – 6.0 Watts Maximum

STARLight PDR 3 Oct ‘01H.28 Miller STARLight FPGA Tradeoffs Altera – PRO: In-house experience High-speec, high-density devices – CON: No extended temperature range devices Large devices in non-BGA packages have limited I/O capabilities More expensive tools Xilinx  Selected – PRO: High-speed, high-density devices Devices support many I/O standards including LVDS and LVPECL Available in extended temperature range versions Less expensive tools (although ModelSim simulator is ‘extra’) – CON: ?

STARLight PDR 3 Oct ‘01H.29 Miller STARLight Design Status Sensor Data Acquisition Board: – Prototype and Flight boards are identical – Schematic 75% complete – Most components ordered and received – FPGA Design 10% complete Sensor Control Board: – Prototype and Flight boards are identical – Schematic 25% complete – Most components ordered and received – FPGA Design 10% complete Development Tools: – Schematic capture: McCad – FPGA Development: Xilinx ISE & ModelSim – Analysis: Matlab, Simulink

STARLight PDR 3 Oct ‘01H.30 Miller STARLight Schedule