DSP online algorithms for the ATLAS TileCal Read Out Drivers Cristobal Cuenca Almenar IFIC (University of Valencia-CSIC)

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Presentation transcript:

DSP online algorithms for the ATLAS TileCal Read Out Drivers Cristobal Cuenca Almenar IFIC (University of Valencia-CSIC)

Outline System overview Code structure Processing tasks Optimal Filtering Muon tagging Missing Et

ATLAS detector

Hadronic Tile Calorimeter 4 m 12 m EBA LB A LB C EBC 

Hadronic Tile Calorimeter

Read Out Chain PMT SHAPER DIGITIZER TILECAL MODULE READ OUT DRIVER SYSTEM Optical Fibers

Read Out Driver board G-links

Read Out Driver board Staging FPGAs

Read Out Driver board Processing Units

Read Out Driver board Output Controller FPGAs

Read Out Driver board Serializers

Read Out Driver board VME and TTC FPGA

Read Out Driver board Staging FPGAs G-links Processing Units Optical Fibers Transition Module Output Controller FPGAs SerializersVME and TTC FPGA

Processing Units: DSP Eight functional units: 2 multipliers 6 arithmetic and logical units 8/16/32-bit data support 40-bit arithmetic options Clock cycle of 720 MHz Memory: 1056 Kbytes 32 Kbytes cache 1024 Kbytes RAM Real time fixed-point processor TMS360C6414xTM Texas Instruments

Trigger signal distribution ATLAS three trigger levels. Read-Out Drivers (ROD). Processing Units TTC Information

Outline System overview Code structure Processing tasks Optimal Filtering Muon tagging Missing Et

Code structure

Circular buffers Two input buffers / one output Circular buffers: pointers defined at configuration time.

Commands and Internal Registers Commands: configure the DSP processing variables: event size processing task TTC synchronization Missing Et & Muons tag Histogramming Staging / Full operation modes Internal Registers: Online information of the detector read-out performance. Information available from the ATLAS TDAQ official software.

Synchronization task BCID checking : Front-End data vs. TTC information TTC events always processed. Resynchronization tasks to restore single errors. Timer interruptions to avoid stopping the system when a module fails.

Outline System overview Code structure Processing tasks Optimal Filtering Muon tagging Missing Et

Reconstruction Algorithms Requirements: Send reconstructed information to the 2nd level trigger Work in real-time at 1st level trigger rate LHC rate: 100 kHz First years rate: ~50 kHz Commissioning rate (during July-August 2006): ~1Hz Proposed algorithms: Optimal Filtering: Reconstruction of the energy and arrival time of the particles Transverse Energy: Calculation of the transverse energy deposited on each module Muon Tag: Identification of low transverse momentum muons

Optimal Filtering (I) OF: amplitude, phase and Quality Factor. Digital Samples ATLAS Physics run : 7 samples Pedestal: Baseline of the signal. Weights obtained from the pulse shape and noise autocorrelation matrix.

Optimal Filtering (II) Input data: 16 DMU blocks with 3 channels each. Individual channel gain transmitted in the DMU block header. 7 samples per channel. Pedestal assignment. Weights downloaded from a database by the TDAQ software at configuration time. Energy  Time  QF Roundup, scaling and packing adaptation for the output data format.

Muon tagging Input data: Energy from OF algorithm. Upper and lower thresholds: Low threshold cuts the electronic noise Upper threshold eliminates hadronic showers and tails Output: number of muons found and Pseudorapidities of these muons

Missing Et algorithm Input data: energy from OF algorithm DSP fast computation of: Total transverse energy per module X and Y projections Output packed in event sub- fragment toguether with Muon tagging algorithm output.

Conclusions An Optimal Filter has been implemented in the TileCal Read Out Driver for online data reconstruction Two trigger oriented algorithms have also been implemented: Muon tagging Transverse energy calculation These algorithms have been tested successfully during TileCal commissioning phase last summer. Working now on improving timing and performance