CMOS Linear Mixer Design for High Performance Receiver Applications Jiming Jiang22 Sept 2005 Department of Engineering, University of Cambridge.

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Presentation transcript:

CMOS Linear Mixer Design for High Performance Receiver Applications Jiming Jiang22 Sept 2005 Department of Engineering, University of Cambridge

Design Issue Non-linearity Bandwidth Power Consumption Conversion Gain Noise

Target Specification 150MHz 300MHz 1.5GHz 0dB 10-15dB 5-10dBm 0.35um 5dB 0-5dB 5-10dB 10dB 5dBm 0-5dBm 1.2GHz600MHz400MHz Bandwidth 2.5GHz1.2 GHz600MHzIntermediate Frequency 10GHz 5GHz2.5GHz Radio Frequency 0-5dB Conversion Gain 10dB Noise Figure 5dBm IIP3 0.09um 0.13um0.18umProcess

Non-linearity: Third Order Inter-modulation Distortion

Analysis Methods for Prediction of Non-linearity Taylor series –Simple approach but not adequate for high frequency analysis Harmonic balance –Accurate but only suitable for numerical work, eg computer simulation Volterra series –Accurate but complicated procedure demanded

IMD3 using Volterra Series Common Source: Differential Pair:

Inductance Negative real number Decrease Capacitance Positive real number Increase Discussions:Linearity improvement methods Discussion 1: Linearity Enhancement based on degeneration component Discussion 2:Linearity based on A1(s) and T1 Increasing A1(s) -> Linearity decrease Increasing T1 -> Linearity increase

Linearity Enhancement With Capacitance and Degeneration Inductance With source and degeneration impedanceWith external capacitance and degeneration inductance

Resistive CapacitiveInductive Good Linearity Noisy resistance Good Linearity No noise Added Bad Linearity Noisy Source Conclusion

IIP3 With Swept Inductance and Capacitance Value NB: Simulation is based on AMS 0.35um BSIM3 Model

Inductance degeneration Capacitance degeneration Simulation Circuit Setup

Without Improvement (IIP3=10dbm)

With Improvement (IIP3=23.5dBm)

Proposed Linearity Enhancement method: Pre-Distortion