מבנה מחשבים הרצאה 1 מבנה מחשבים Lecture 1 Course Introduction Yehuda Afek and Yossi Matias Slides from Randy H. Katz, and John Wawrzynek Berkeley

הרצאה 1 שקף 2 Lecture Overview  Introduction : Computer Architecture  Administrative Matters  Engineering:  ממוליכים וחשמל ועד פעולות בינריות בסיסיות במחשב מתח חשמלי מוליכים סיליקון : מוליך למחצה טרנזיסטור פעולות בינריות ברכיבים אלקטרוניים

הרצאה 1 שקף 3 What is “Computer Architecture”? Computer Architecture =  Instruction Set Architecture +  Machine Organization + …  = הנדסה + ארכיטקטורה

הרצאה 1 שקף 4 Instruction Set Architecture (subset of Computer Architecture) “... the attributes of a [computing] system as seen by the programmer, i.e., the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation.” – Amdahl, Blaaw, and Brooks, 1964SOFTWARE Organization of Programmable Storage Data Types & Data Structures: Encodings & Representations Instruction Set Instruction Formats Modes of Addressing and Accessing Data Items and Instructions Exceptional Conditions

הרצאה 1 שקף 5 Computer Architecture’s Changing Definition  1950s to 1960s Computer Architecture Course Computer Arithmetic  1970s to mid 1980s Computer Architecture Course Instruction Set Design, especially ISA appropriate for compilers  1990s Computer Architecture Course Design of CPU, memory system, I/O system, Multi- processors, Networks  2000s Computer Architecture Course: Special purpose architectures, Functionally reconfigurable, Special considerations for low power/mobile processing

הרצאה 1 שקף 6 The Instruction Set: a Critical Interface instruction set software hardware

הרצאה 1 שקף 7 Example ISAs (Instruction Set Architectures)  Digital Alpha(v1, v3)  HP PA-RISC(v1.1, v2.0)  Sun Sparc(v8, v9)  SGI MIPS(MIPS I, II, III, IV, V)  Intel(8086,80286,80386, ,Pentium, MMX,...) Itanium/I

הרצאה 1 שקף 8 MIPS R3000 Instruction Set Architecture (Summary)  Instruction Categories Load/Store Computational Jump and Branch Floating Point -coprocessor Memory Management Special R0 - R31 PC HI LO OP rs rt rdsafunct rs rt immediate jump target 3 Instruction Formats: all 32 bits wide Registers Q: How many already familiar with MIPS ISA?

הרצאה 1 שקף 9 Organization  Capabilities & performance characteristics of principal functional units (e.g., Registers, ALU, Shifters, Logic Units,...)  Ways in which these components are interconnected  Information flows between components  Logic and means by which such information flow is controlled  Choreography of FUs to realize the ISA  Register Transfer Level (RTL) Description Logic Designer's View ISA Level FUs & Interconnect

הרצאה 1 שקף 10 The Big Picture  Since 1946 all computers have had 5 components Control Datapath Memory Processor Input Output

הרצאה 1 שקף 11 Example Organization  TI SuperSPARC tm TMS390Z50 in Sun SPARCstation20 Floating-point Unit Integer Unit Inst Cache Ref MMU Data Cache Store Buffer Bus Interface SuperSPARC L2 $ CC MBus Module MBus L64852 MBus control M-S Adapter SBus DRAM Controller SBus DMA SCSI Ethernet STDIO serial kbd mouse audio RTC Boot PROM Floppy SBus Cards

הרצאה 1 שקף 12 What is “Computer Architecture”?  Coordination of many levels of abstraction  Under a rapidly changing set of forces  Design, Measurement, and Evaluation I/O systemInstr. Set Proc. Compiler Operating System Application Digital Design Circuit Design Instruction Set Architecture Firmware Datapath & Control Layout

הרצאה 1 שקף 13 Forces on Computer Architecture Computer Architecture Technology Programming Languages Operating Systems History Applications Cleverness

הרצאה 1 שקף 14 Applications and Languages  CAD, CAM, CAE,...  Lotus, DOS,...  Multimedia,...  The Web,...  JAVA,...  The Net => ubiquitous computing  ???

הרצאה 1 שקף 15 Computers in the News: Sony Playstation 2000  As reported in Microprocessor Report, Vol 13, No. 5: Emotion Engine: 6.2 GFLOPS, 75 million polygons per second Graphics Synthesizer: 2.4 Billion pixels per second Claim: Toy Story realism brought to games!

הרצאה 1 שקף 16 Where are We Going?? מבנה מחשבים  Arithmetic Single/multicycle Datapaths IFetchDcdExecMemWB IFetchDcdExecMemWB IFetchDcdExecMemWB IFetchDcdExecMemWB PipeliningMemory Systems I/O

הרצאה 1 שקף 17 Course Content Computer Architecture and Engineering Instruction Set DesignComputer Organization InterfacesHardware Components Compiler/System ViewLogic Designer’s View ­“Building Architect”­“Construction Engineer”

הרצאה 1 שקף 18 מבנה מחשבים : So What's In It For Me?  In-depth understanding of the inner-workings of modern computers, their evolution, and trade-offs present at the hardware/software boundary. Insight into fast/slow operations that are easy/hard to implementation hardware Out-of-order execution and branch prediction  Experience with the design process in the context of a large complex (hardware) design. Functional Spec --> Control & Datapath --> Physical implementation Modern CAD tools  Designer's "Conceptual" toolbox

הרצאה 1 שקף 19 Course Administration  Instructors: Yehuda Afek Yossi Matias  TAs:Alon Shekler Dror Ironi  Mailing list:  Materials:  Text: V. C. Hamacher, Z. G. Vranesic, S. G. Zaky Computer Organization. McGraw-Hill, 1982Computer Organization. Hennessy and Patterson, Computer Architecture, A Quant-itative Approach, 3 rd Ed., (recommended as an advanced reference)

הרצאה 1 שקף 20 Grading ציון :  מבחן סופי 80%  תרגילים 20% 8 תרגילים

הרצאה 1 שקף 21 Levels of Representation High Level Language Program Assembly Language Program Machine Language Program Control Signal Specification Compiler Assembler Machine Interpretation temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; lw$15,0($2) lw$16,4($2) sw$16,0($2) sw$15,4($2) °°°° ALUOP[0:3] <= InstReg[9:11] & MASK

הרצאה 1 שקף 22 Execution Cycle Instruction Fetch Instruction Decode Operand Fetch Execute Result Store Next Instruction Obtain instruction from program storage Determine required actions and instruction size Locate and obtain operand data Compute result value or status Deposit results in storage for later use Determine successor instruction

הרצאה 1 שקף 23 It’s All About Communication Proc Caches Busses Memory I/O Devices: Controllers adapters Disks Displays Keyboards Networks  All have interfaces & organizations  Um…. It’s the network stupid???! Pentium III Chipset

הרצאה 1 שקף 24 SO  All computers consist of five components Processor: (1) datapath and (2) control (3) Memory (4) Input devices and (5) Output devices  Not all “memory” are created equally Cache: fast (expensive) memory are placed closer to the processor Main memory: less expensive memory--we can have more  Interfaces are where the problems are - between functional units and between the computer and the outside world  Need to design against constraints of performance, power, area and cost

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הרצאה 1 שקף 28 Technology Trends Imply Dramatic Change  Processor Logic capacity:about 30% per year Clock rate:about 20% per year  Memory DRAM capacity:about 60% per year (4x every 3 years) Memory speed:about 10% per year Cost per bit:improves about 25% per year  Disk Capacity:about 60% per year Total data use:100% per 9 months!  Network Bandwidth Bandwidth increasing more than 100% per year!

הרצאה 1 שקף 29 Technology  In ~1985 the single-chip processor (32-bit) and the single- board computer emerged workstations, personal computers, multiprocessors have been riding this wave since  In the timeframe, these may well look like mainframes compared to single-chip computers (maybe 2 chips) DRAM YearSize Kb Kb Mb Mb Mb Mb Mb Gb Microprocessor Logic DensityDRAM chip capacity

הרצאה 1 שקף 30 Performance Trends Microprocessors Minicomputers Mainframes Supercomputers 1995 Year Log of Performance

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