Room: Timbalan Pengarah Pusat Komputer Phone: 03-8921 6150 Dr Masri Ayob TK 2633 Microprocessor & Interfacing Lecture 4: Introduction.

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Presentation transcript:

Room: Timbalan Pengarah Pusat Komputer Phone: Dr Masri Ayob TK 2633 Microprocessor & Interfacing Lecture 4: Introduction to 8085 Instruction Set (1)

Prepared by: Dr Masri Ayob - TK2123 2INTRODUCTION A microcomputer performs a task by reading and executing the set of instructions written in its memory. A microcomputer performs a task by reading and executing the set of instructions written in its memory. This set of instructions, written in a sequence, is called a program. This set of instructions, written in a sequence, is called a program. Each instruction in the program is a command, in binary, to the microprocessor to perform an operation. Each instruction in the program is a command, in binary, to the microprocessor to perform an operation.

Prepared by: Dr Masri Ayob - TK MACHINE CONTROL OPERATIONS

Prepared by: Dr Masri Ayob - TK DATA TRANSFER OPERATIONS The data transfer instructions ‘copy’ data from a source into a destination without modifying the contents of the source. The data transfer instructions ‘copy’ data from a source into a destination without modifying the contents of the source. The previous contents of the destination are replaced by the contents of the source. The previous contents of the destination are replaced by the contents of the source.

Prepared by: Dr Masri Ayob - TK DATA TRANSFER OPERATIONS

Prepared by: Dr Masri Ayob - TK2123 6

7

8 EXAMPLE 1

Prepared by: Dr Masri Ayob - TK EXAMPLE 2 Load the accumulator A with the data byte 82H (the letter H indicates hexadecimal number), and save the data in register B. Load the accumulator A with the data byte 82H (the letter H indicates hexadecimal number), and save the data in register B. Instructions: MVI A, 82H, MOV B,A MOV B,A The first instruction is a 2-byte instruction that loads the accumulator with the data byte 82H, and the second instruction MOV B,A copies the contents of the accumulator in register B without changing the contents of the accumulator.

Prepared by: Dr Masri Ayob - TK EXAMPLE 3 Write instructions to read 8 ON/OFF switches connected to the input port with the address OOH, and turn on the devices connected to the output port with the address 01H, as shown in Figure 6.1. Write instructions to read 8 ON/OFF switches connected to the input port with the address OOH, and turn on the devices connected to the output port with the address 01H, as shown in Figure 6.1.

Prepared by: Dr Masri Ayob - TK SOLUTION FOR EXAMPLE 3 The input has eight switches that are connected to the data bus through the tri-state buffer. The input has eight switches that are connected to the data bus through the tri-state buffer. Any one of the switches can be connected to +5 V (logic 1) or to ground (logic 0), Any one of the switches can be connected to +5 V (logic 1) or to ground (logic 0), and each switch controls the corresponding device at the output port. and each switch controls the corresponding device at the output port. The microprocessor needs to read the bit pattern on the switches and send the same bit pattern to the output port to turn on the corresponding devices. The microprocessor needs to read the bit pattern on the switches and send the same bit pattern to the output port to turn on the corresponding devices. Instructions: INOOH OUT01H OUT01H HLT HLT When MPU executes the instruction IN 00H, it enables the tri-state buffer. When MPU executes the instruction IN 00H, it enables the tri-state buffer. The bit pattern 4FH formed by the switch positions is placed on the data bus and transferred to the accumulator (reading an input port). The bit pattern 4FH formed by the switch positions is placed on the data bus and transferred to the accumulator (reading an input port). When MPU executes OUT 01H, When MPU executes OUT 01H, it places the contents of the accumulator on the data bus and enables the output port O1H (writing to output port). it places the contents of the accumulator on the data bus and enables the output port O1H (writing to output port). The output port latches the bit pattern and turns ON/OFF the devices connected to the port according to the bit pattern. The output port latches the bit pattern and turns ON/OFF the devices connected to the port according to the bit pattern.

Prepared by: Dr Masri Ayob - TK Illustrative Program: Data Transfer PROBLEM STATEMENT PROBLEM STATEMENT Load the hexadecimal number 37H in register B, and display the number at the output port labeled PORT1. Load the hexadecimal number 37H in register B, and display the number at the output port labeled PORT1. PROBLEM ANALYSIS PROBLEM ANALYSIS Step 1: Load register B with a number. Step 1: Load register B with a number. Step 2: Send the number to the output port. Step 2: Send the number to the output port. QUESTIONS TO BE ASKED QUESTIONS TO BE ASKED Is there an instruction to load the register B? YES—MVI B. Is there an instruction to load the register B? YES—MVI B. Is there an instruction to send the data from register B to the output port? NO. Review the instruction OUT. This instruction sends data from the accumulator to an output port. Is there an instruction to send the data from register B to the output port? NO. Review the instruction OUT. This instruction sends data from the accumulator to an output port. The solution appears to be as follows: Copy the number from register B into accumulator A. The solution appears to be as follows: Copy the number from register B into accumulator A. Is there an instruction to copy data from one register to another register? YES—MOV Rd,Rs. Is there an instruction to copy data from one register to another register? YES—MOV Rd,Rs.

Prepared by: Dr Masri Ayob - TK Illustrative Program: Data Transfer FLOWCHART FLOWCHART Generally, a flowchart is used for two purposes: Generally, a flowchart is used for two purposes: to assist and clarify the thinking process to assist and clarify the thinking process and to communicate the programmer’s thoughts or logic to others. and to communicate the programmer’s thoughts or logic to others.

Prepared by: Dr Masri Ayob - TK Illustrative Program: Data Transfer

Prepared by: Dr Masri Ayob - TK Illustrative Program: Data Transfer

Prepared by: Dr Masri Ayob - TK Illustrative Program: Data Transfer

Prepared by: Dr Masri Ayob - TK Exercises Write instructions to read the data at input PORT 07H and at PORT 08H. Display the input data from PORT 07H at output PORT OOH, and store the input data from PORT 08H in register B. Write instructions to read the data at input PORT 07H and at PORT 08H. Display the input data from PORT 07H at output PORT OOH, and store the input data from PORT 08H in register B.

Prepared by: Dr Masri Ayob - TK Move Immediate Instructions

Prepared by: Dr Masri Ayob - TK Move Immediate Instructions The memory location, which is indirectly addressed by the HL register pair, appears as the letter M in all instructions.

Prepared by: Dr Masri Ayob - TK Direct Data Transfer Instructions Direct data transfer instructions are useful if only one byte or word of data is transferred to or from the memory. Direct data transfer instructions are useful if only one byte or word of data is transferred to or from the memory. If more than one byte or word is transferred, it is more efficient to use indirectly addressed instruction. If more than one byte or word is transferred, it is more efficient to use indirectly addressed instruction.

Prepared by: Dr Masri Ayob - TK Direct Data Transfer Instructions

Prepared by: Dr Masri Ayob - TK Direct Data Transfer Instructions

Prepared by: Dr Masri Ayob - TK Direct Data Transfer Instructions Copies the contents of location 1000H into the L register and the contents of location 1001 H into the H register stores the contents of the L register at memory location I200H and the H register at location 1201H

Prepared by: Dr Masri Ayob - TK INDIRECT DATA TRANSFER INSTRUCTIONS With register indirect addressing, a register pair holds the address of the memory location accessed by the instruction. With register indirect addressing, a register pair holds the address of the memory location accessed by the instruction. The contents of the register pair indirectly addresses a memory location. The contents of the register pair indirectly addresses a memory location. Whenever, the letter M appears instead of a register, the HL register pair indirectly addresses a memory location. Whenever, the letter M appears instead of a register, the HL register pair indirectly addresses a memory location.

Prepared by: Dr Masri Ayob - TK INDIRECT DATA TRANSFER INSTRUCTIONS

Prepared by: Dr Masri Ayob - TK INDIRECT DATA TRANSFER INSTRUCTIONS

Prepared by: Dr Masri Ayob - TK REGISTER DATA TRANSFER INSTRUCTIONS

Prepared by: Dr Masri Ayob - TK REGISTER DATA TRANSFER INSTRUCTIONS

Prepared by: Dr Masri Ayob - TK STACK DATA TRANSFER INSTRUCTIONS The Intel 8085A microprocessor has a LIFO (last- in, first-out) stack memory. The Intel 8085A microprocessor has a LIFO (last- in, first-out) stack memory. The stack memory stores both return addresses from subroutines and data temporarily. The stack memory stores both return addresses from subroutines and data temporarily. The microprocessor cannot locate the stack memory when power is first applied to the system because the number in the SP is unknown. The microprocessor cannot locate the stack memory when power is first applied to the system because the number in the SP is unknown. The location of the stack must be initialised after the application of system power. The location of the stack must be initialised after the application of system power.

Prepared by: Dr Masri Ayob - TK STACK DATA TRANSFER INSTRUCTIONS The programmer decides what portion of the read/write memory is to function as the stack, and then loads the SP with the top location plus one byte. The programmer decides what portion of the read/write memory is to function as the stack, and then loads the SP with the top location plus one byte. The byte location above the stack is never used, but must be the initial value of the stack pointer. The byte location above the stack is never used, but must be the initial value of the stack pointer. The SP always points to the current exit point. The SP always points to the current exit point. The stack is a LIFO stack. The stack is a LIFO stack.

Prepared by: Dr Masri Ayob - TK STACK DATA TRANSFER INSTRUCTIONS If data are pushed (placed) onto the stack, they move into the memory locations addressed by SP-1 and SP-2. If data are pushed (placed) onto the stack, they move into the memory locations addressed by SP-1 and SP-2. Note that pairs of registers always move to the stack. Note that pairs of registers always move to the stack. A PUSH instruction stores the high-order register first (SP - 1), followed by the low-order register (SP -2). A PUSH instruction stores the high-order register first (SP - 1), followed by the low-order register (SP -2). The SP then decrements by two so that the next push occurs below the first. The SP then decrements by two so that the next push occurs below the first. Notice that when the PUSH occurs, nothing is placed at the location addressed by the stack pointer. Notice that when the PUSH occurs, nothing is placed at the location addressed by the stack pointer. This is why the SP is initialised at one byte above the top of the stack. This is why the SP is initialised at one byte above the top of the stack.

Prepared by: Dr Masri Ayob - TK STACK DATA TRANSFER INSTRUCTIONS

Prepared by: Dr Masri Ayob - TK STACK DATA TRANSFER INSTRUCTIONS

Prepared by: Dr Masri Ayob - TK STACK DATA TRANSFER INSTRUCTIONS It is also important to note that PUSHes and POPs must occur in pairs: It is also important to note that PUSHes and POPs must occur in pairs: one PUSH, one POP, one PUSH, one POP, two PUSHes, two POPs, and so on. two PUSHes, two POPs, and so on. Note: POP PSW will copy the data from location pointed by SP into flag register and data from (SP+1) will copy into A. The SP=SP+2.

Prepared by: Dr Masri Ayob - TK MISCELLANEOUS DATA TRANSFER INSTRUQTIONS Exchange DE with HL (XCHG) Exchange DE with HL (XCHG) The XCHG instruction exchanges the contents of the HL register pair with the contents of the DE register pair. The XCHG instruction exchanges the contents of the HL register pair with the contents of the DE register pair. Load SP from HL (SPHL) Load SP from HL (SPHL) Is a one-byte instruction, copies the contents of the HL register pair into the SP. Is a one-byte instruction, copies the contents of the HL register pair into the SP. Exchange HL with Stack Data (XTHL) Exchange HL with Stack Data (XTHL) This instruction exchanges the contents of the HL pair with the most recent data on the stack. This instruction exchanges the contents of the HL pair with the most recent data on the stack. Input/Output Data Transfer Instructions Input/Output Data Transfer Instructions IN : instruction inputs data from an I/O device into the accumulator. IN : instruction inputs data from an I/O device into the accumulator. OUT : sends accumulator data out to an I/O device. OUT : sends accumulator data out to an I/O device.

Prepared by: Dr Masri Ayob - TK SUMMARY Data transfer instructions transfer information from register to register, from register to memory, from memory to register. Data transfer instructions transfer information from register to register, from register to memory, from memory to register. Data transfer instructions also allow data transfer between registers and stack or the I/O devices in a system. Data transfer instructions also allow data transfer between registers and stack or the I/O devices in a system. The Intel 8085A uses four different addressing modes: direct, register, register indirect, and immediate. The Intel 8085A uses four different addressing modes: direct, register, register indirect, and immediate. Direct addressing accesses a memory location to transfer data between memory and the accumulator or HL register pair. The address of the data follow with the instruction in the memory. Direct addressing accesses a memory location to transfer data between memory and the accumulator or HL register pair. The address of the data follow with the instruction in the memory. Register addressing allows either a single 8-bit register (B, C, D, E, H, L, or A) or a 16-bit register pair (BC, DE, HL, and SP). Register addressing allows either a single 8-bit register (B, C, D, E, H, L, or A) or a 16-bit register pair (BC, DE, HL, and SP). Register indirect addressing allows the instruction to address memory through the address held in a register pair. Register indirect addressing allows the instruction to address memory through the address held in a register pair.

Prepared by: Dr Masri Ayob - TK SUMMARY Immediate addressing is used whenever the data (8 or 16 bits) are a constant. Immediate data immediately follow the opcode in the program. Immediate addressing is used whenever the data (8 or 16 bits) are a constant. Immediate data immediately follow the opcode in the program. The M register or operand indirectly addresses memory through the HL register pair. The M register or operand indirectly addresses memory through the HL register pair. The LDA and STA instructions load or store the accumulator. The LHLD and SHLD instructions load or store the HL register pair. The LDA and STA instructions load or store the accumulator. The LHLD and SHLD instructions load or store the HL register pair. Besides M for indirectly addressing the memory, the DE and BC register pairs are also available. The LDAX and STAX instructions allow the accumulator to be indirectly stored or loaded from the memory by using the BC or DE register pairs. Besides M for indirectly addressing the memory, the DE and BC register pairs are also available. The LDAX and STAX instructions allow the accumulator to be indirectly stored or loaded from the memory by using the BC or DE register pairs.

Prepared by: Dr Masri Ayob - TK SUMMARY Register data transfer instructions are the most numerous form of data transfer: 63 instructions. Register data transfer instructions are the most numerous form of data transfer: 63 instructions. The stack memory is a LIFO (last-in, first-out) memory that stores data and return addresses from subroutines. The stack memory is a LIFO (last-in, first-out) memory that stores data and return addresses from subroutines. The SP register indirectly addresses the stack. The stack functions with the stack data transfer instructions PUSH, POP, and XTHL. The SP register indirectly addresses the stack. The stack functions with the stack data transfer instructions PUSH, POP, and XTHL. The PSW is the processor status word that contains both the accumulator and the flag byte. The accumulator is the high-order register and the flag bits are the low-order register. The PSW is the processor status word that contains both the accumulator and the flag byte. The accumulator is the high-order register and the flag bits are the low-order register. IN and OUT effect data transfers between an external I/O device and the accumulator. IN and OUT effect data transfers between an external I/O device and the accumulator. I/O devices are often called I/O ports and are addressed by an 8-bit I/O port address. I/O devices are often called I/O ports and are addressed by an 8-bit I/O port address.

Prepared by: Dr Masri Ayob - TK Exercises Write a sequence of immediate instructions that store a 16H into memory location 1200H and a 17H in memory location 1202H. Write a sequence of immediate instructions that store a 16H into memory location 1200H and a 17H in memory location 1202H. Write a sequence of instructions that use register indirect addressing to transfer the contents of A into location 2800H, B into 2801H, and C into 2802H. Write a sequence of instructions that use register indirect addressing to transfer the contents of A into location 2800H, B into 2801H, and C into 2802H. Write a sequence of instructions that use register indirect addressing to transfer the number stored in memory location 1300H into memory location 2302H. Write a sequence of instructions that use register indirect addressing to transfer the number stored in memory location 1300H into memory location 2302H.

Prepared by: Dr Masri Ayob - TK Thank you Q&A