1 of 30 June 14, 2000 Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop Department of Computer and Information Science Linköpings universitet

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 2 of 30 June 14, 2000 Outline n Motivation n System Model and Architecture n Scheduling and Communication Synthesis Time Driven Systems Event Driven Systems n Real Life Example n Conclusions

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 3 of 30 June 14, 2000 Embedded Systems General purpose systemsEmbedded systems Microprocessor market shares in 1999

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 4 of 30 June 14, 2000 Distributed Real-Time Systems Safety critical applications (e.g. Drive-by-Wire): timing constraints, data and control dependencies. Communication protocols: Time Triggered Protocol (TTP), Controller Area Network (CAN). Scheduling of processes and communication of messages: guaranteeing timing constraints.

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 5 of 30 June 14, 2000 Hardware/Software Codesign System Specification Architecture Selection Scheduling Integration Hardware Synthesis Partitioning Software Synthesis Goals of the thesis: Scheduling... Scheduling of processes and messages for distributed hard real-time applications with control and data dependencies in the context of a given communication protocol. Communication synthesis... Optimization of the parameters of the communication protocol so that the overall system performance is increased and the imposed timing constraints are satisfied.

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 6 of 30 June 14, 2000 Related Work Scheduling: Static cyclic non-preemptive scheduling: P. Eles, G. Fohler, D. D. Gajski, H. Kasahara, H. Kopetz, K. Kuchcinski, J. Madsen, J. Xu. Fixed priority preemptive scheduling: J. Axelsson, S. Baruah, A. Burns, J. W. Layland, C. L. Liu, K. Tindell, J. A. Stankovic,, W. Wolf, T. Y. Yen. Communication synthesis: G. Borriello, R. Ernst, H. Hansson, J. Madsen, R. B. Ortega, K. Tindell.

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 7 of 30 June 14, 2000 Characteristics and Message Distributed hard real-time applications. Heterogeneous system architectures. Systems with data and control dependencies. Scheduling of processes: Time triggered: Static cyclic non-preemptive scheduling, Event triggered: Fixed priority preemptive scheduling. Communications using the time-triggered protocol (TPP). The performance of the system can be significantly improved by considering the communication protocol and the control dependencies during scheduling.

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 8 of 30 June 14, 2000 Outline n Motivation Ô System Model and Architecture n Scheduling and Communication Synthesis Time Driven Systems Event Driven Systems n Real Life Example n Conclusions

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 9 of 30 June 14, 2000 Conditional Process Graph (CPG) P4P4 P4P4 P5P5 P5P5 P7P7 P7P7 P 13 P 15 First processor Second processor ASIC C C DD P0P0 P 18 P1P1 P1P1 P2P2 P2P2 P3P3 P3P3 P6P6 P6P6 P8P8 P8P8 P9P9 P9P9 P 10 P 11 P 12 P 14 P 16 P 17 C K K P0P0 P 18 P1P1 P2P2 P3P3 P6P6 P8P8 P9P9 P 10 P 11 P 12 P 14 P 16 P 17 Subgraph corresponding to DCK

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 10 of 30 June 14, 2000 Hardware Architecture Hard real-time distributed systems. Nodes interconnected by a broadcast communication channel. Nodes consisting of: TTP controller, CPU, RAM, ROM, I/O interface. Communication between nodes is based on the time-triggered protocol. I/O Interface TTP Controller CPU RAM ROM ASIC Node

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 11 of 30 June 14, 2000 Time Triggered Protocol H. Kopetz, Technical University of Vienna. Intended for distributed real-time control applications that require high degree of dependability and predictability. Recommended by the X-by-Wire Consortium for use in safety critical applications in vehicles. Integrates all the services required in the design of fault-tolerant distributed real-time systems. S0S0 S1S1 S2S2 S3S3 S0S0 S1S1 S2S2 S3S3 TDMA Round Cycle of two rounds Slot Bus access scheme: time-division multiple-access (TDMA). Schedule table located in each TTP controller: message descriptor list (MEDL). I/O Interface TTP Controller CPU RAM ROM ASIC Node

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 12 of 30 June 14, 2000 Outline n Motivation n System Model and Architecture Ô Scheduling and Communication Synthesis  Time Driven Systems Event Driven Systems n Real Life Example n Conclusions

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 13 of 30 June 14, 2000 Time Triggered Processes Input Safety-critical application with several operating modes. Each operating mode is modelled by a CPG. The system architecture and mapping of processes to nodes are given. The worst case delay of each process is known. Output Local schedule tables for each node and the MEDL for the TTP controllers. Delay on the system execution time for each operating mode, so that this delay is as small as possible. Problem Formulation Note Processes scheduled with static cyclic non-preemptive scheduling, and messages according to the TTP.

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 14 of 30 June 14, 2000 Scheduling Example P1P1 P1P1 P4P4 P4P4 P2P2 P2P2 P3P3 P3P3 m1m1 m2m2 m3m3 m4m4 S1S1 S0S0 Round 1Round 2Round 3Round 4Round 5 P1P1 P4P4 P2P2 m1m1 m2m2 m3m3 m4m4 P3P3 24 ms Round 1 P1P1 Round 2Round 3Round 4 S1S1 S0S0 m1m1 m2m2 m3m3 m4m4 P2P2 P3P3 P4P4 22 ms Round 1Round 2Round 3 S1S1 S0S0 P2P2 P3P3 P4P4 P1P1 m1m1 m2m2 m3m3 m4m4 20 ms

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 15 of 30 June 14, The scheduling algorithm has to take into consideration the TTP. Priority function for the list scheduling. 2. The optimization of the TTP parameters is driven by the scheduling. Sequence and lengths of the slots in a TDMA round are determined to reduce the delay. Two approaches: Greedy heuristic, Simulated Annealing (SA). Two variants: Greedy 1 tries all possible slot lengths, Greedy 2 uses feedback from the scheduling algorithm. SA parameters are set to guarantee near-optimal solutions in a reasonable time. Scheduling Strategy

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 16 of 30 June 14, 2000 Experimental Results Deviations from the near-optimal schedule lengths obtained by SA: Number of processes Average Percentage Deviation [%]

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 17 of 30 June 14, 2000 Outline n Motivation n System Model and Architecture Ô Scheduling and Communication Synthesis Time Driven Systems  Event Driven Systems n Real Life Example n Conclusions

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 18 of 30 June 14, 2000 Input An application modelled using conditional process graphs. Each process has an execution time, a period, a deadline, and a priority. The system architecture and mapping of processes are given. Output Schedulability analysis for systems modelled using CPGs. Schedulability analysis for the time-triggered protocol. The MEDL for the TTP controllers so that the process set is schedulable on an as cheap (slow) as possible processor set. Event Triggered Processes Problem Formulation Note Processes scheduled with fixed priority preemptive scheduling, and messages according to the TTP.

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 19 of 30 June 14, 2000 Example P3P3 P3P3 P5P5 P5P5 C P0P0 P0P0 P1P1 P1P1 P6P6 P6P6 P2P2 P2P2 P7P7 P7P7 P4P4 P4P4 P8P8 P8P8 C  1 : 200 P 11 P 12 P9P9 P9P9 P  2 : 150 Deadline: 110

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 20 of 30 June 14, 2000 Experimental Results Average Percentage Deviation [%] Number of processes Relaxed Tightness 2 Relaxed Tightness 1 Conditions Separation Brute Force Ignoring Conditions Cost function: degree of schedulability

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 21 of 30 June 14, 2000 Experimental Results (Cont.) Average execution time [s] Number of processes Relaxed Tightness 2 Relaxed Tightness 1 Conditions Separation Brute Force Ignoring Conditions

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 22 of 30 June 14, 2000 Scheduling of Messages over TTP 1. Single message per frame, allocated statically: Static Single Message Allocation (SM) 2. Several messages per frame, allocated statically: Static Multiple Message Allocation (MM) m1m1 m2m2 m5m5 m3m3 m4m4 Round 1Round 2Round 3 S0S0 S1S1 messages are dynamically produced by the processes frames are statically determined by the MEDL 3. Several messages per frame, allocated dynamically: Dynamic Message Allocation (DM) 4. Several messages per frame, split into packets, allocated dynamically Dynamic Packets Allocation (DP)

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 23 of 30 June 14, 2000 Experimental Results Dynamic Message Single Message Dynamic Packets Multiple Messages Ad-hoc Average Percentage Deviation [%] Number of processes Cost function: degree of schedulability

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 24 of 30 June 14, 2000 Optimizing Bus Access (SM and MM) m1m1 m2m2 p1p1 p2p2 p3p3 m2m2 m1m1 p1p1 p2p2 p3p3 Swapping m 1 with m 2 : all processes meet their deadlines. m1m1 m2m2 p1p1 p2p2 p3p3 Putting m 1 and m 2 in the same slot: all processes meet their deadline, the communication delays are reduced. Process p 2 misses its deadline!

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 25 of 30 June 14, 2000 OptimizeDM for each node N i do MinSize Si = max(size of messages m j sent by node N i ) end for for each slot S i BestSize Si = MinSize Si for each SlotSize in [MinSize Si...MaxSize] do calculate the CostFunction if the CostFunction is best so far then BestSize Si = SlotSize Si end if end for size Si = BestSize Si end for end OptimizeDM Initialization: the size of a slot in a TDMA round has to accommodate the largest message sent by the corresponding node. Greedy heuristic: finds the local optimum for each slot. Local optimum: find the best size for this slot, the size that leads to the “best so far” cost function. OptimizeDM: Find the slot sizes that maximize the “degree of schedulability” for each node N i do MinSize Si = max(size of messages m j sent by node N i ) end for for each slot S i BestSize Si = MinSize Si for each SlotSize in [MinSize Si...MaxSize] do calculate the CostFunction if the CostFunction is best so far then BestSize Si = SlotSize Si end if end for size Si = BestSize Si end for end OptimizeDM

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 26 of 30 June 14, 2000 Experimental Results The quality of the greedy optimization heuristics: Average percentage deviations [%] Number of processes

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 27 of 30 June 14, 2000 Outline n Motivation n System Model and Architecture n Scheduling and Communication Synthesis Time Driven Systems Event Driven System Ô Real Life Example n Conclusions

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 28 of 30 June 14, 2000 Real Life Example Vehicle cruise controller. Modelled with a CPG of 32 processes and two conditions. Mapped on 5 nodes: CEM, ABS, ETM, ECM, TCM. Time triggered processes: (deadline 400 ms) Ad-hoc: 429 ms Greedy 1:314 ms Greedy 2:323 ms SA:302 ms Event triggered processes: (no messages, deadline 130 ms) Ignoring Conditions: 138 ms Conditions Separation:132 ms Relaxed Tightness 1, 2:124 ms Brute Force:124 ms

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 29 of 30 June 14, 2000 Conclusions and Future Work Time triggered processes: Extension to static scheduling for CPGs to handle TTP. Improved schedule quality by using new priority function that considers the time triggered protocol. Significant performance improvements can be obtained by optimizing the access to the communication channel. Event triggered processes: Schedulability analysis with the TTP: four message scheduling approaches compared based on the issue of schedulability. Significant improvements to the “degree of schedulability” through the optimization of the bus access scheme. The pessimism of the analysis can be drastically reduced by considering the conditions. Mapping of processes and architecture selection.

Scheduling and Communication Synthesis for Distributed Real-Time Systems Paul Pop 30 of 30 June 14, 2000 Contributions Time triggered processes: Static scheduling strategy for systems with both control and data dependencies. Optimization strategies for the synthesis of the bus access scheme. Event triggered processes: Less pessimistic schedulability analysis for hard real-time systems with both control and data dependencies Schedulability analysis for the time-triggered protocol. Optimization strategies for the synthesis of the bus access scheme.