1. 1 of 12 May 3, 2000 Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng Department of Computer and Information Science Linköpings universitet Sweden

2. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 2 of 12 May 3, 2000 Motivation and Characteristics Performance estimation. Worst case delay on the system execution time. Characteristics: Distributed hard real-time applications. Heterogeneous system architectures. Fixed priority preemptive scheduling. Systems with data and control dependencies.

3. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 3 of 12 May 3, 2000 Schedulability Analysis Message: The pessimism of the analysis can be significantly reduced by considering the conditions during the analysis. Schedulability test: The worst case response time of each process is compared to its deadline. Process models: Independent processes; Data dependencies: release jitter, offsets, phases; Control dependencies: modes, periods, recurring tasks.

4. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 4 of 12 May 3, 2000 Conditional Process Graph P4P4 P4P4 P5P5 P5P5 P7P7 P7P7 P 13 P 15 First processor Second processor ASIC C C DD P0P0 P 18 P1P1 P1P1 P2P2 P2P2 P3P3 P3P3 P6P6 P6P6 P8P8 P8P8 P9P9 P9P9 P 10 P 11 P 12 P 14 P 16 P 17 C K K P0P0 P 18 P1P1 P2P2 P3P3 P6P6 P8P8 P9P9 P 10 P 11 P 12 P 14 P 16 P 17 Subgraph corresponding to DCK

5. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 5 of 12 May 3, 2000 Problem Formulation Input An application modelled using conditional process graphs (CPG). Each CPG in the application has its own independent period. Each process has a worst case execution time, a deadline, and a priority. The system architecture and mapping of processes are given. Output Worst case response times for each process. Performance estimation for systems modelled using conditional process graphs.

6. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 6 of 12 May 3, 2000 Example P3P3 P3P3 P5P5 P5P5 C P0P0 P0P0 P1P1 P1P1 P6P6 P6P6 P2P2 P2P2 P7P7 P7P7 P4P4 P4P4 P8P8 P8P8 C 27 30 24 19 25 30 22  1 : 200 P 11 P 12 P9P9 P9P9 P 10 25 32  2 : 150 Deadline: 110

7. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 7 of 12 May 3, 2000 Task Graphs with Data Dependencies K. Tindell: Adding Time-Offsets to Schedulabilty Analysis, Research Report Offset: fixed interval in time between the arrival of sets of tasks. Can reduce the pessimism of the schedulability analysis. Drawback: how to derive the offsets? T. Yen, W. Wolf: Performance Estimation for Real-Time Distributed Embedded Systems, IEEE Transactions On Parallel and Distributed Systems Phase (similar concept to offsets). Advantage: gives a framework to derive the phases.

8. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 8 of 12 May 3, 2000 DelayEstimate(task graph G, system S) for each pair (P i, P j ) in G maxsep[P i, P j ]=  end for step = 0 repeat LatestTimes(G) EarliestTimes(G) for each P i  G MaxSeparations(P i ) end for until maxsep is not changed or step < limit return the worst case delay d G of the graph G end DelayEstimate Schedulability Analysis for Task Graphs worst case response times and upper bounds for the offsets lower bounds for the offsets maximum separation: maxsep[P i, P j ]=0 if the execution of the two processes never overlaps

9. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 9 of 12 May 3, 2000 Schedulability Analysis for CPGs, 1 Two extreme solutions: Ignoring Conditions (IC) Ignore control dependencies and apply the schedulability analysis for the (unconditional) task graphs. Brute Force Algorithm (BF) Apply the schedulability analysis after each of the CPGs in the application have been decomposed in their constituent unconditional subgraphs.

10. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 10 of 12 May 3, 2000 Schedulability Analysis for CPGs, 2 In between solutions: Conditions Separation (CS) Similar to Ignoring Conditions but uses the knowledge about the conditions in order to update the maxsep table: maxsep[P i, P j ] = 0 if P i and P j are on different conditional paths. Relaxed Tightness Analysis (two variants: RT1, RT2) Similar to the Brute Force Algorithm, but tries to reduce the execution time by removing the iterative tightening loop (relaxed tightness) in the DelayEstimation function.

11. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 11 of 12 May 3, 2000 Experimental Results 0 20 40 60 80 100 80160240320400 Average Percentage Deviation [%] Number of processes Relaxed Tightness 2 Relaxed Tightness 1 Conditions Separation Brute Force Ignoring Conditions

12. Performance Estimation for Embedded Systems with Data and Control Dependencies Paul Pop, Petru Eles, Zebo Peng 12 of 12 May 3, 2000 Conclusions Performance estimation for hard real-time systems with control and data dependencies. Modelling using conditional process graphs that capture both the flow of data and that of control. Heterogeneous architectures, fixed priority scheduling. Five approaches to the schedulability analysis of such systems. Extensive experiments and a real-life example show that: The pessimism of the analysis can be significantly reduced by considering the conditions during the analysis.