Arithmetic CPSC 321 Computer Architecture Andreas Klappenecker

Overview Number representations Overflows Floating point numbers Arithmetic logic units

Unsigned Numbers 32 bits are available Range = = Upper bound 2 32 –1 =

Number representations What signed integer number representations do you know?

Signed Numbers Sign-magnitude representation MSB represents sign, 31bits for magnitude One’s complement Use for non-negative range Invert all bits for negative numbers Two’s complement Same as one’s complement except negative numbers are obtained by inverting all bits and adding 1

Advantages and Disadvantages  sign-magnitude representation  one’s complement representation  two’s complement representation

Signed Numbers (3bits) sign magnitudeone’s complementtwo’s complement = = = = = = = = = = = = = = = = -1

Two’s complement The unsigned sum of an n-bit number its negative yields? Example with 3 bits: = 2 n => negate(x) = 2 n -x Explain one’s complement

two = 0 ten two = +1 ten two = +2 ten two = +2,147,483,646 ten two = +2,147,483,647 ten two = –2,147,483,648 ten two = –2,147,483,647 ten two = –2,147,483,646 ten two = –3 ten two = –2 ten two = –1 ten MIPS 32bit signed numbers

Conversions How do you convert an n-bit number into a 2n-bit number? (Assume two’s complement representation)

Conversions Suppose that you have 3bit two’s complement number = -3 Convert into a 6bit two’s complement number = -3 Replicate most significant bit!

Comparisons What can go wrong if you accidentally compare unsigned with signed numbers?

Comparisons for [un]signed Register $s Register $s Compare registers (set less than) slt $t0, $s0, $s1yes, since –1 < 1 sltu $t1, $s0, $s1 no, since >1

Just like in grade school (carry/borrow 1s) Two's complement operations easy subtraction using addition of negative numbers Addition & Subtraction

Overflow means that the result is too large for a finite computer word for example, adding two n-bit numbers does not yield an n-bit number  the term overflow is somewhat misleading Overflow

No overflow when adding a positive and a negative number No overflow when signs are the same for subtraction Overflow occurs when the value affects the sign: overflow when adding two positives yields a negative or, adding two negatives gives a positive or, subtract a negative from a positive and get a negative or, subtract a positive from a negative and get a positive Detecting Overflow

OperationOperand AOperand BOverflow if result A+B>=0 <0 A+B<0 >=0 A-B>=0<0 A-B<0>=0

An exception (interrupt) occurs Control jumps to predefined address for exception Interrupted address is saved for possible resumption Don't always want to detect overflow MIPS instructions: addu, addiu, subu note: addiu still sign-extends! Effects of Overflow

What next? More MIPS assembly operations How does an ALU work? Simple digital logic design How can we speed-up addition? What about multiplication?