EE 434 Lecture 12 Devices in Semiconductor Processes Diodes Capacitors MOS Transistors.

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Presentation transcript:

EE 434 Lecture 12 Devices in Semiconductor Processes Diodes Capacitors MOS Transistors

Quiz 10 A “10K” resistor has a temperature coefficient of +80ppm/ o C If the resistor was measured to be 9.83K at 20 o C, what would be the resistor value at 80 o C?

And the number is ….

Quiz 10 Solution A “10K” resistor has a temperature coefficient of +80ppm/ o C If the resistor was measured to be 9.83K at 20 o C, what would be the resistor value at 80 o C?

Process Flow is a “recipe” for the process –Shows what can and can not be made –Gives insight into performance capabilities and limitations Back-End Processes –Die attach options (eutectic, preform,conductive epoxy) Stresses the die –Bonding Wire bonding Bump bonding –Packaging Many packaging options Package Costs can be large so defective die should be eliminated before packaging Review from Last Time

Basic Devices and Device Models Resistor Diode Capacitor MOSFET BJT

Diodes (pn junctions) Depletion region created that is ionized but void of carriers NP

pn Junctions Physical Boundary Separating n-type and p-type regions If doping levels identical, depletion region extends equally into n-type and p-type regions NP

pn Junctions Physical Boundary Separating n-type and p-type regions Extends farther into p-type region if p-doping lower than n-doping N+N+ P-P-

pn Junctions Physical Boundary Separating n-type and p-type regions Extends farther into n-type region if n-doping lower than p-doping N-N- P+P+

pn Junctions V I NP

V I I V Diode Equation: J S = Sat Current Density A= Junction Cross Section Area V T =kT/q n is approximately 1 NP

Basic Devices and Device Models Resistor Diode Capacitor MOSFET BJT

Capacitors Types –Parallel Plate –Fringe –Junction

Parallel Plate Capacitors C d A1A1 A2A2 cond 1 cond 2 insulator A = area of intersection of A 1 & A 2 One (top) plate intentionally sized smaller to determine C  : Dielectric constant

Parallel Plate Capacitors where

Fringe Capacitors d C A is the area where the two plates are parallel Only a single layer is needed to make fringe capacitors

Fringe Capacitors C

Capacitance d depletion region C Junction Capacitor Note: d is voltage dependent -capacitance is voltage dependent -usually parasitic caps -varicaps or varactor diodes exploit voltage dep. of C d p n VDVD C j0 : junction capacitance at V D = 0V  B : barrier or built-in potential

Basic Devices and Device Models Resistor Diode Capacitor MOSFET BJT

n-Channel MOSFET Poly n-active Gate oxide p-sub

n-Channel MOSFET L EFF L W Source DrainGate Bulk

n-Channel MOSFET Poly n-active Gate oxide p-sub depletion region (electrically induced)

n-Channel MOSFET Operation and Model V BS V GS V DS Apply small V GS (V DS and V BS assumed to be small) I D =0 I G =0 I B =0 Depletion region electrically induced in channel IDID IGIG IBIB Termed “cutoff” region of operation

n-Channel MOSFET Operation and Model V BS V GS V DS Increase V GS (V DS and V BS assumed to be small) I D =0 I G =0 I B =0 Depletion region in channel becomes larger IDID IGIG IBIB

n-Channel MOSFET Operation and Model V BS V GS V DS Increase V GS more I D R CH =V DS I G =0 I B =0 Inversion layer forms in channel IDID IGIG IBIB (V DS and V BS small) Inversion layer will support current flow from D to S Channel behaves as thin-film resistor Critical value of V GS that creates inversion layer termed threshold voltage, V T )

n-Channel MOSFET Operation and Model V BS V GS V DS Increase V GS more I D R CH =V DS I G =0 I B =0 Inversion layer in channel thickens IDID IGIG IBIB (V DS and V BS small) R CH will decrease Termed “ohmic” or “triode” region of operation

Triode Region of Operation For V DS small

n-Channel MOSFET Operation and Model V BS V GS V DS Increase V DS I D =? I G =0 I B =0 Inversion layer thins near drain IDID IGIG IBIB (V BS small) I D no longer linearly dependent upon V DS Still termed “ohmic” or “triode” region of operation

Triode Region of Operation For V DS larger

n-Channel MOSFET Operation and Model V BS V GS V DS Increase V DS even more I D =? I G =0 I B =0 Inversion layer disappears near drain IDID IGIG IBIB (V BS small) Termed “saturation”region of operation Saturation first occurs when V DS =V GS -V T

Saturation Region of Operation For V DS at saturation

n-Channel MOSFET Operation and Model V BS V GS V DS Increase V DS even more (beyond V GS -V T ) I D =? I G =0 I B =0 Nothing much changes !! IDID IGIG IBIB (V BS small) Termed “saturation”region of operation

Saturation Region of Operation For V DS in Saturation

Model Summary Note: This is the third model we have introduced for the MOSFET