ICRM RMT Working Group Review John Keightley

Slides:



Advertisements
Similar presentations
5/4/2006BAE Analog to Digital (A/D) Conversion An overview of A/D techniques.
Advertisements

A scalable DAQ system using the DRS4 sampling chip H.Friederich 1, G.Davatz 1, U.Hartmann 2, A.Howard 1, H.Meyer 1, D.Murer 1, S.Ritt 2, N.Schlumpf 2 1.
Signal Digitization Issues for the NLC Muon Detector Mani Tripathi UC, Davis 8/5/03 Starting Point: 1.Time of arrival measurement with O(1 ns) resolution.
ICRM RMT Working Group Meeting John Keightley Mike Unterweger.
TileCal Electronics A Status Report J. Pilcher 17-Sept-1998.
Neutron background measurements at LNGS Gian Luca Raselli INFN - Pavia JRA1 meeting, Paris 14 Feb
PDACS Midterm Presentation Michelle Berger John Curtin Trey Griffin Aaron King Michael Nordfelt Jeffrey Whitted.
LS User’s Forum 2001 Developments in LSC Andy Pearce CIRM Date: 5th September 2001.
6 June 2002UK/HCAL common issues1 Paul Dauncey Imperial College Outline: UK commitments Trigger issues DAQ issues Readout electronics issues Many more.
1 Analysis code for KEK Test-Beam M. Ellis Daresbury Tracker Meeting 30 th August 2005.
Data Acquisition for Biofeedback System Using LabVIEW Characterization Presentation Performed by Rapoport Alexandra Supervised by Eugene Rivkin Technion.
Y. Karadzhov MICE Video Conference Thu April 9 Slide 1 Absolute Time Calibration Method General description of the TOF DAQ setup For the TOF Data Acquisition.
Yu. Artyukh, V. Bespal’ko, E. Boole, V. Vedin Institute of Electronics and Computer Science Riga, LATVIA 16th International Workshop on Laser.
DATA ACQUISITION Today’s Topics Define DAQ and DAQ systems Signals (digital and analogue types) Transducers Signal Conditioning - Importance of grounding.
CPS120: Introduction to Computer Science
ECE-L304 Lecture 5. 2 Step 3 Lab Complete 8-pin header Data Bus Test Port Resistor Array LED Array Timing & Filter Components Self-Clocked ADC DAC External.
1 HBD Commissioning (II) Itzhak Tserruya HBD group meeting November 28, 2006 Progress from October 3 to November 28, 2006.
Status Report Atsushi Nukariya. FPGA training course ・ I solved 15 problems which are proposed by Uchida-san. ・ I used above circuit board. FPGA.
Prototype Test of SPring-8 FADC Module Da-Shung Su Wen-Chen Chang 02/07/2002.
Analog to Digital Converters (ADC) Ben Lester, Mike Steele, Quinn Morrison.

With funding from the European Union DEVELOPMENT OF MONITORING INSTRUMENTS FOR JUDICIAL AND LAW ENFORCEMENT INSTITUTIONS IN THE WESTERN BALKANS
ArgonneBeamTest_ ppt1 Argonne Beam Test preparation Tsunefumi Mizuno Tuneyoshi Kamae
Number System. Number Systems Important Number systems – Decimal – Binary – Hexadecimal.
Topics to be covered : How to model memory in Verilog RAM modeling Register Bank.
ArgonneBeamTest_ ppt1 Argonne Beam Test preparation Tsunefumi Mizuno Tuneyoshi Kamae
1 Workshop Topics - Outline Workshop 1 - Introduction Workshop 2 - module instantiation Workshop 3 - Lexical conventions Workshop 4 - Value Logic System.
A Front End and Readout System for PET Overview: –Requirements –Block Diagram –Details William W. Moses Lawrence Berkeley National Laboratory Department.
1 Workshop Topics - Outline Workshop 1 - Introduction Workshop 2 - module instantiation Workshop 3 - Lexical conventions Workshop 4 - Value Logic System.
11-th CBM Collaboration Meeting. GSI Darmstadt Feb , A New Data Acquisition System based on Asynchronous Technique Yu. Bocharov, A. Gumenyuk,
Assignment 8 solutions 1) Design and draw combinational logic to perform multiplication of two 2-bit numbers (i.e. each 0 to 3) producing a 4-bit result.
CMS and the Number Sorter Presented to you by: Bobby Scurlock Faculty Mentor: Darin Acosta.
With funding from the European Union DEVELOPMENT OF MONITORING INSTRUMENTS FOR JUDICIAL AND LAW ENFORCEMENT INSTITUTIONS IN THE WESTERN BALKANS
1 Performance of a Magnetised Scintillating Detector for a Neutrino Factory Scoping Study Meeting Rutherford Appleton Lab Tuesday 25 th April 2006 M. Ellis.
TELL1 high rate Birmingham Karim Massri University of Birmingham CEDAR WG Meeting – CERN – 26/03/2012.
AIMS’99 Workshop Heidelberg, May 1999 Assessing Audio Visual Quality P905 - AQUAVIT Assessment of Quality for audio-visual signals over Internet.
Digital Control CSE 421.
16722 Mo: data acquisition150+1 data acquisition.
Database David Forrest. What database? DBMS: PostgreSQL. Run on dedicated Database server at RAL Need to store information on conditions of detector as.
Chapter No. 18 Radiation Detection and Measurements, Glenn T. Knoll, Third edition (2000), John Willey. Multichannel Pulse Analysis.
Digital Systems and Information Dr. Sanjay P. Ahuja, Ph.D. FIS Distinguished Professor of CIS ( ) School of Computing, UNF.
1 Chapter No. 17 Radiation Detection and Measurements, Glenn T. Knoll, Third edition (2000), John Willey. Measurement of Timing Properties.
1 Status report 2011/8/12 Atsushi Nukariya. 2 Progress ・ FPGA -> Revision is completed. -> Obtained data from front-end chip. ・ Software.
TOPIC : Introduction to Sequential Circuits UNIT 1: Modeling and Simulation Module 4 : Modeling Sequential Circuits.
Interactive LED Staircase Modules Group 38 Mike Udelhofen ECE 445 April 26, 2012.
1 Chapter No. 9 Measurements and Detection of Radiation, Nicholas Tsolfanadis, 2010, McGRAW-HILL BOOK INTRODUCTION TO SPECTROSCOPY.
 13 Readout Electronics A First Look 28-Jan-2004.
"North American" Electronics
DAQ ACQUISITION FOR THE dE/dX DETECTOR
Results with the RPC system of OPERA and perspectives
Digital Control CSE 421.
Data analysis and modeling: the tools of the trade
Tracker Upgrade Simulations Software Harry Cheung (Fermilab)
Migration of reconstruction and analysis software to C++
L. Ratti, M. Manghisoni Università degli Studi di Pavia INFN Pavia
How Good is a Model? How much information does AIC give us?
Programmable Interval Timer
Global PID MICE CM43 29/10/15 Celeste Pidcott University of Warwick
A First Look J. Pilcher 12-Mar-2004
Pulse Processing Chapter No. 17
Multichannel Pulse Analysis
Introduction to Computer Science
Multichannel Pulse Analysis
Agenda Basics of powder dosing Gain-in-Weight technique
Signal processing Lecture: Hans-Jürgen Wollersheim
Monte Carlo simulation of the DIRC prototype
Search for coincidences and study of cosmic rays spectrum
Computer Basics PE 266 Dr. Mike Butler.
Programmable Interval Timer
Agile Project Management and Quantitative Risk Analysis
Presentation transcript:

ICRM RMT Working Group Review John Keightley

ICRM : RMT Working Group RMT Working Group (RMT – WG) re-instated following ICRM 2001 Loss of Many “experts” in the field over the last years VERMI Workshops RMT Sessions have continued at ICRM Broad Range of Topics Coincidence Counting Monte Carlo Modelling New Detector Systems/Techniques  Bolometry (LNHB) Digital Data Acquisition for Coincidence Counting Comparisons Large Area Source measurements …

RMT Working Group In my opinion, this range of topics is too large for RMT Working Group Coordinators to keep control or make valuable input … 3 major tasks assigned to Working Group Digital Coincidence Counting (DCC) Data Conversions and comparisons (John Keightley) DCC data set Simulations (John Keightley) Tritium Comparisons (Mike Unterweger) Does not reflect full range of topics covered Volunteers for other areas ? (Please !) Discuss in Working Group Meeting

Digital Coincidence Counting (DCC) Data Conversions and comparisons

Coincidence Counting for radionuclide standardisations

Conventional Coincidence Counting ADC SCA Dead Time Delays Coinc. Mixer Scalers MCA Etc…

Digital Coincidence Counting (DCC) NPL/ANSTO KRISS CMI VNIIFTRI

DCC Data List Mode with Time Stamps for each event

Digital Coincidence Counting Data Format Conversions Conversion routines written as 32 bit DLLs in Visual C++ Only recently finished DCC – CMI conversion (last week)

Binary Data Format : Viewed in “Hexadecimal” form Large data sets.

DCC Comparisons Each system uses different data format and independent analysis software HOWEVER : WE SHOULD ALL GET SAME RESULTS FOR MEASURED ACTIVITY Same input data sets Initial Tests with data from 56 Mn source NOT to be published … First attempt at data conversions looks promising

NPL/ANSTO Digitisation does not impose extra dead time 12 bit ADCs : 20 MSPS

VNIIFTRI Pulse Time and Height (no shape data) 10  s non extending dead time inherent in digitisation process 10 bit ADCs

KRISS Pulse Time and Height (12 bit) (no shape data) 8  s non extending dead time inherent in digitisation process 28 bit clock at 100 MSPS

CMI Pulse Time and Height (8 bit) No shape data “Common” variable dead time

Preliminary Results : 56 Mn

DCC Simulation (DCC_SIM) Introduce in Working Group Meeting Test software routines at higher count rates than currently achievable in hardware i.e: REALLY test corrections for dead times, resolving times etc … Mimic output of Digitiser cards KNOWN activity, extrapolation fit parameters