BR 1/991 Dice Game Chap 22 1-to-6 Cntr Adder CntbCnta Point Register Comparator dicesum Test Logic ControlControl Roll D7 D11 D2312 eq Dpathb.vhd Dpatha.vhd control.vhd Rb Ra sp win lose

BR 1/992 Dice Game Implementation Dice game implemented in three 22V10 PLDs –control.vhd (Finite State Machine) –dpatha.vhd (two 1-6 counters, adder) –dpathb.vhd (point register, comparator, test logic) The Control FSM is implemented using one-hot encoding. –Outputs q0, q1, q5 are states S0, S1, S5. Output “win” is state S2, output “lose” is state S3. Outputs q0,q1,q5 are available just for debugging purposes.

BR 1/993 Finite State Machine Changes Asynchronous Reset now use to exit states S2, S3. Resets back to State S0. S2 Win S3 Lose

BR 1/994 Finite State Machine Changes (cont). Because we don’t have debounced switches, added extra “roll” input called “Ra”. Changed States S1, S5 to use Ra, not Rb. S1 Ra 0 1 Roll S5 Ra 0 1 Roll This means that to roll the dice, you use flip switch Rb up, then down. This starts the dice rolling. To stop the dice, Flip Ra switch up then down.

BR 1/995 “dpatha” Details Clk C 3 EN R Cntr Q Roll (from control) Reset C 3 EN R Q Logic Roll Clk Reset Cntb Cnta AdderAdder 4 dicesum 3 Ena Ena = 1 when Cntb = 6 and Roll = 1 Counters count 1,2,3,4,5,6,1,2, etc

BR 1/996 “dpathb” Details DIN 4 C LD Register Point 4 R Dicesum (from dpatha) sp (from control) Compare Clk Reset Eq (1 if point = sum) Test Logic D7 (1 if sum=7) D7 (1 if sum=11) D2312 (1 if sum=2,3 or 12) “sp” (save point) loads value of dicesum into register.