ECE 424 Embedded Systems Design Lecture 11: Embedded Platform Boot Sequence Chapter 6 Ning Weng
Introduction What is boot sequence? Why we care? 2 or 3 phases ─ BIOS/fireware: from processor reset vector ─ OS boot loader: from storage devices ─ OS Ning WengECE 4242
Multi-core/threads Boot Basic terms ─ Thread, core, package and SOC, Bootstrap processor (BSP), Aps Wait-for-SIPI state: wait for startup inter processor interrupt Ning WengECE 4243
Image Storage Technologies Ning WengECE 4244
S1: Power Sequencing Ning WengECE 4245
S2: Reset Reset vector: the location of these initial processor instructions ─ Inel 16 bytes Hardware and software reset Operation modes ─ Real ─ Flat protected mode ─ Segmented protected mode Ning WengECE 4246
S3: Early Initialization CPU and memory controller initialization ─ CPU ─ IA Microcode update ─ Device Initialization ─ Memory Configuration ─ Post-memory setup ─ Shadowing ─ AP Initialization Ning WengECE 4247
S4: Advanced Initialization Platform related initialization, peripheral-specific ─ GPIO ─ Interrupt/Cache controller ─ Timers ─ PCIe bus ─ Image storage … Ning WengECE 4248
S5: Boot Loader Identifying the image and handoff to the image See next slides for overall boot flow Ning WengECE 4249
Ning WengECE 42410
PXE (Networking Booting) Ning WengECE 42411
Announcement Read chapter 7 for OS overview Friday, 9/21 Exam 1 HW and Lab due Ning WengECE 42412