Microprocessors

Microprocessor Buses Address Bus Address Bus One way street over which microprocessor sends an address code to memory or other external drives. One way street over which microprocessor sends an address code to memory or other external drives. Data Bus Data Bus Two way street which data or instruction codes are transferred into the microprocessor which result in operation or computation is sent into the microprocessor Two way street which data or instruction codes are transferred into the microprocessor which result in operation or computation is sent into the microprocessor Control Bus Control Bus Used by the microprocessor to coordinate its operations to communicate with external devices. Used by the microprocessor to coordinate its operations to communicate with external devices.

Microprocessor programming Data Transfer Data Transfer Arithmetic Arithmetic Bit manipulation Bit manipulation Loops and jump Loops and jump Strings Strings Subroutines and interrupts Subroutines and interrupts Processor control Processor control

Terminologies Assembly language - low level languages that can be translated into binary instructions. Assembly language - low level languages that can be translated into binary instructions. Assembler- program converts the English like instructions Assembler- program converts the English like instructions Mnemonics – converts into binary pattern Mnemonics – converts into binary pattern Compiler – translate the high level program statements into machine language Compiler – translate the high level program statements into machine language

CPU history 8086 – 1978 – 16 bit data bus 8086 – 1978 – 16 bit data bus – 1982 – 24 address line, 16 megabytes – 1982 – 24 address line, 16 megabytes – 1985 – 32 bit data bus, 32 external 4 Giga bytes – 1985 – 32 bit data bus, 32 external 4 Giga bytes – k byte cache memory max 66 MHz – k byte cache memory max 66 MHz Pentium – 64 bits data bus 32 bit registers 66 MHz Pentium – 64 bits data bus 32 bit registers 66 MHz Pentium Pro – MHz Pentium Pro – MHz Pentium II – new instruction 400 – 450 MHz Pentium II – new instruction 400 – 450 MHz Pentium III – 1999 – 70 new instruction, 3D imaging 500Mhz- 1GHz Pentium III – 1999 – 70 new instruction, 3D imaging 500Mhz- 1GHz Pentium IV GHz -3GHZ Pentium IV GHz -3GHZ

Motorola microprocessor 680X0 family – 16 bit devices, 8 bit data bus – 16 bit devices, 8 bit data bus – 32 bit microprocessors 4 G byte memory – 32 bit microprocessors 4 G byte memory – 256 byte cache for data 50 MHz – 256 byte cache for data 50 MHz – 4 K byte each with chip math compressor – 4 K byte each with chip math compressor – multiple pipelining of instructions 8 K byte caches for data and instruction – multiple pipelining of instructions 8 K byte caches for data and instruction Power PC MPC K bytes RISC microprocessor (reduced instruction set computer) Power PC MPC K bytes RISC microprocessor (reduced instruction set computer)

Basic Computer Operation Block Diagram Input PortOutput Port CPU Microprocessor Memory Unit RAM ROM And Hard Disk Data Bus Control Bus Address Bus

Computer port communication

EU and BIU

Internal Organization of 8088