2.3) Example of program execution 1. instruction  B25 8 Op-code B means to change the value of the program counter if the contents of the indicated register.

Slides:



Advertisements
Similar presentations
Chapter 2: Data Manipulation
Advertisements

Central Processing Unit
Chapter 2 Data Manipulation Dr. Farzana Rahman Assistant Professor Department of Computer Science James Madison University 1 Some sldes are adapted from.
 Suppose for a moment that you were asked to perform a task and were given the following list of instructions to perform:
Computer Systems. Computer System Components Computer Networks.
Lecture 14: Review Intro to IT COSC1078 Introduction to Information Technology Lecture 14 Revision and Review James Harland
The Structure of the CPU
Computer Organization and Architecture Tutorial 2 Kenneth Lee.
Computer Processing CSCE 110 J. Michael Moore.
Chapter 2.2 Machine Language.
Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction.
1 Sec (2.3) Program Execution. 2 In the CPU we have CU and ALU, in CU there are two special purpose registers: 1. Instruction Register 2. Program Counter.
J. Michael Moore Computer Processing CSCE 110. J. Michael Moore ProcessorInputOutput Memory Storage.
Inside The CPU. Buses There are 3 Types of Buses There are 3 Types of Buses Address bus Address bus –between CPU and Main Memory –Carries address of where.
Basic Operational Concepts of a Computer
Lecture 3. Diff b/w RAM and Registers Registers are used to hold data immediately applicable to the operation at hand Registers are used to hold data.
Lecture 11: Machine Processing Intro to IT COSC1078 Introduction to Information Technology Lecture 11 Machine Processing James Harland
Computer Science 210 Computer Organization The von Neumann Architecture.
Memory and Addressing How and Where Information is Stored.
CPU Design. Introduction – The CPU must perform three main tasks: Communication with memory – Fetching Instructions – Fetching and storing data Interpretation.
Assembly Language A Brief Introduction. Unit Learning Goals CPU architecture. Basic Assembler Commands High level Programming  Assembler  Machine Language.
Lecture 14 Today’s topics MARIE Architecture Registers Buses
CS 111 – Sept. 15 Chapter 2 – Manipulating data by performing instructions “What is going on in the CPU?” Commitment: –Please read through section 2.3.
Chapter 2 Data Manipulation © 2007 Pearson Addison-Wesley. All rights reserved.
COMPUTER SCIENCE Data Representation and Machine Concepts Section 2.1 Instructor: Lin Chen Sept 2013.
Computer Science 101 Computer Systems Organization ALU, Control Unit, Instruction Set.
Fetch-execute cycle.
CMSC 150 PROGRAM EXECUTION CS 150: Wed 1 Feb 2012.
Lecture 7: 9/17/2002CS149D Fall CS149D Elements of Computer Science Ayman Abdel-Hamid Department of Computer Science Old Dominion University Lecture.
Computer Architecture Lecture 03 Fasih ur Rehman.
Represents different voltage levels High: 5 Volts Low: 0 Volts At this raw level a digital computer is instructed to carry out instructions.
1.4 Representation of data in computer systems Instructions.
Computer Systems Organization
An Example Architecture. A Paper Computer - Woody Woody's characteristics Word size – 8 bits One word.
20 October 2015Birkbeck College, U. London1 Introduction to Computer Systems Lecturer: Steve Maybank Department of Computer Science and Information Systems.
Chapter 2 Data Manipulation © 2007 Pearson Addison-Wesley. All rights reserved.
Dale & Lewis Chapter 5 Computing components
Data Manipulation, part two Introduction to computer, 2 nd semester, 2010/2011 Mr.Nael Aburas Faculty of Information.
Chapter 2 Data Manipulation © 2007 Pearson Addison-Wesley. All rights reserved.
An Adder A Subtractor. A and B are the inputs of the adder/ subtractor R is the output of the adder/ subtractor F is the control to tell it to add or.
CMSC 104, Lecture 061 Stored Programs A look at how programs are executed.
Chapter 2 Data Manipulation © 2007 Pearson Addison-Wesley. All rights reserved.
27 October 2015 Birkbeck College, U. London1 Introduction to Computer Systems Lecturer: Steve Maybank Department of Computer Science and Information Systems.
Representation of Data Binary Representation of Instructions teachwithict.weebly.com.
Lec 4-2 Five operations of the machine cycle Fetch- fetch the next program instruction from memory. (PC+1); instruction to IR Decode- decode the instruction.
First Foray into Programming (the hard way). A reminder from last lesson: A machine code instruction has two parts:  Op-code  Operand An instruction.
Chapter 7: Low-Level Programming Languages Chapter 7 Low-Level Programming Languages Page 66 In order to execute instructions on a CPU, those instructions.
Instruction Memory value Description ADD1xx Add the value stored at memory address xx to the value in the accumulator register SUB2xx Subtract the value.
Programming in Machine Language
CPU Organisation & Operation
CHAPTER 6: The Little Man Computer
Computer Science 210 Computer Organization
Data Representation – Instructions
The fetch-execute cycle
The Processor and Machine Language
THE sic mACHINE CSCI/CMPE 3334 David Egle.
Computer Programming Machine and Assembly.
CS149D Elements of Computer Science
Intel 8080 Processor The 8080 was an 8-bit processor
The Little Man Computer
Sequencing, Selection, and Loops in Machine Language
THE FETCH-EXECUTE CYCLE.
Program Execution.
Computer Concept and Practice
CS334: MIPS language _Mars simulator Lab 2_1
THE FETCH-EXECUTE CYCLE.
Instruction execution and ALU
CS 111 – Sept. 16 Machine language examples Instruction execution
Sec (2.3) Program Execution.
Presentation transcript:

2.3) Example of program execution 1

instruction  B25 8 Op-code B means to change the value of the program counter if the contents of the indicated register is the same as that in register 0. This part of the operand identifies the register to be compared to register 0. This part of the operand is the address to be placed in the program counter. 2

TranslationEncoded instruction Load register 5 with the bit pattern found in the memory cell at address 6C. 156C Load register 6 with the bit pattern found in the memory cell at address 6D 166D Add the content of register 5 and 6 as through they were two’s complement representation and leave the result in register Store the contents of register 0 in the memory cell at address 6E. 306E Halt (Stop)C000 3 This an example to load two values from memory 6C and 6D in registers 5 & 6. Then add the values from registers 5 & 6 and put the result in register 0. after that store value in register 0 in memory address 6E. Then stop.

The program stored in main memory ready for execution 4 CPU Main memory program is stored in main memory beginning at address A0 Registers F ? ? ? A0 156C Program Program counter Instruction register Address Cells A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 15 6C 16 6D E C0 00 Bus