10/9: Lecture Topics Starting a Program Exercise 3.2 from H+P Review of Assembly Language RISC vs. CISC.

Slides:



Advertisements
Similar presentations
Henk Corporaal TUEindhoven 2011
Advertisements

1 Lecture 3: MIPS Instruction Set Today’s topic:  More MIPS instructions  Procedure call/return Reminder: Assignment 1 is on the class web-page (due.
Goal: Write Programs in Assembly
Review of the MIPS Instruction Set Architecture. RISC Instruction Set Basics All operations on data apply to data in registers and typically change the.
Lecture 5: MIPS Instruction Set
The University of Adelaide, School of Computer Science
1 Lecture 3: Instruction Set Architecture ISA types, register usage, memory addressing, endian and alignment, quantitative evaluation.
1 ECE462/562 ISA and Datapath Review Ali Akoglu. 2 Instruction Set Architecture A very important abstraction –interface between hardware and low-level.
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /15/2013 Lecture 11: MIPS-Conditional Instructions Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER.
1 Procedure Calls, Linking & Launching Applications Lecture 15 Digital Design and Computer Architecture Harris & Harris Morgan Kaufmann / Elsevier, 2007.
CS1104 – Computer Organization PART 2: Computer Architecture Lecture 5 MIPS ISA & Assembly Language Programming.
ELEN 468 Advanced Logic Design
1 Today’s lecture  Last lecture we started talking about control flow in MIPS (branches)  Finish up control-flow (branches) in MIPS —if/then —loops —case/switch.
1 Nested Procedures Procedures that don't call others are called leaf procedures, procedures that call others are called nested procedures. Problems may.
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /17/2013 Lecture 12: Procedures Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE CENTRAL.
The University of Adelaide, School of Computer Science
10/11: Lecture Topics Slides on starting a program from last time Where we are, where we’re going RISC vs. CISC reprise Execution cycle Pipelining Hazards.
Informationsteknologi Saturday, September 29, 2007 Computer Architecture I - Class 41 Today’s class More assembly language programming.
ENEE350 Spring07 1 Ankur Srivastava University of Maryland, College Park Adapted from Computer Organization and Design, Patterson & Hennessy, © 2005.”
Computer Structure - The Instruction Set (2) Goal: Implement Functions in Assembly  When executing a procedure (function in C) the program must follow.
S. Barua – CPSC 440 CHAPTER 2 INSTRUCTIONS: LANGUAGE OF THE COMPUTER Goals – To get familiar with.
1 Lecture 2: MIPS Instruction Set Today’s topic:  MIPS instructions Reminder: sign up for the mailing list cs3810 Reminder: set up your CADE accounts.
RISC Concepts, MIPS ISA and the Mini–MIPS project
Lecture 5 Sept 14 Goals: Chapter 2 continued MIPS assembly language instruction formats translating c into MIPS - examples.
COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji.
1 Today  Finish-up procedures/stack  strlen example  Machine language, the binary representation for instructions. —We’ll see how it is designed for.
CDA 3101 Fall 2012 Introduction to Computer Organization Instruction Set Architecture MIPS Instruction Format 04 Sept 2013.
IT253: Computer Organization Lecture 4: Instruction Set Architecture Tonga Institute of Higher Education.
13/02/2009CA&O Lecture 04 by Engr. Umbreen Sabir Computer Architecture & Organization Instructions: Language of Computer Engr. Umbreen Sabir Computer Engineering.
Computer Architecture Instruction Set Architecture Lynn Choi Korea University.
COSC 2021: Computer Organization Instructor: Dr. Amir Asif Department of Computer Science York University Handout # 3: MIPS Instruction Set I Topics: 1.
1 Branches and Procedure Calls Lecture 14 Digital Design and Computer Architecture Harris & Harris Morgan Kaufmann / Elsevier, 2007.
April 23, 2001Systems Architecture I1 Systems Architecture I (CS ) Lecture 9: Assemblers, Linkers, and Loaders * Jeremy R. Johnson Mon. April 23,
Lecture 4: MIPS Instruction Set
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /08/2013 Lecture 10: MIPS Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE CENTRAL STATE.
Computer Architecture CSE 3322 Lecture 3 Assignment: 2.4.1, 2.4.4, 2.6.1, , Due 2/3/09 Read 2.8.
10/23: Lecture Topics Input/Output –Mouse, Disk and Network –Buses –SCSI Midterm review.
Chapter 2 CSF 2009 The MIPS Assembly Language. Stored Program Computers Instructions represented in binary, just like data Instructions and data stored.
MS108 Computer System I Lecture 3 ISA Prof. Xiaoyao Liang 2015/3/13 1.
Computer Architecture CSE 3322 Lecture 4 Assignment: 2.4.1, 2.4.4, 2.6.1, , Due 2/10/09
Chapter 2 — Instructions: Language of the Computer — 1 Memory Operands Main memory used for composite data – Arrays, structures, dynamic data To apply.
Chapter 2 — Instructions: Language of the Computer — 1 Conditional Operations Branch to a labeled instruction if a condition is true – Otherwise, continue.
DR. SIMING LIU SPRING 2016 COMPUTER SCIENCE AND ENGINEERING UNIVERSITY OF NEVADA, RENO Session 7, 8 Instruction Set Architecture.
COMPUTER ORGANIZATION LECTURE 3: ISA YASSER MOHAMMAD.
MIPS Assembly.
Prof. Hsien-Hsin Sean Lee
Computer Architecture Instruction Set Architecture
Computer Architecture Instruction Set Architecture
Morgan Kaufmann Publishers
Lecture 4: MIPS Instruction Set
ELEN 468 Advanced Logic Design
RISC Concepts, MIPS ISA Logic Design Tutorial 8.
Procedures (Functions)
ENGR 3410 – Computer Architecture Mark L. Chang Fall 2006
Assembly Programming using MIPS R3000 CPU
Instructions - Type and Format
Lecture 4: MIPS Instruction Set
Computer Architecture & Operations I
MIPS Instruction Encoding
The University of Adelaide, School of Computer Science
ECE232: Hardware Organization and Design
The University of Adelaide, School of Computer Science
MIPS Instruction Encoding
Lecture 5: Procedure Calls
Review.
Computer Instructions
COMS 361 Computer Organization
UCSD ECE 111 Prof. Farinaz Koushanfar Fall 2018
Assembly Programming using MIPS R3000 CPU
9/27: Lecture Topics Memory Data transfer instructions
Presentation transcript:

10/9: Lecture Topics Starting a Program Exercise 3.2 from H+P Review of Assembly Language RISC vs. CISC

Frame Pointer $sp is enough to find the saved registers and the local variables $fp is a convenience foo(){ int Array1[20]; int i;... for(i=0; i<20; i++){ int Array2[20];... for(j=0; j<20; j++){ int Array3[20];... } $fp

The Executable End result of compiling, assembling, and linking: the executable Contains: –Header, listing the lengths of the other segments –Text segment –Static data segment –Potentially other segments, depending on architecture & OS conventions

Run Time We’ll learn a lot more about this during the OS part of the course In a nutshell: –Some dynamic linking may occur some symbols aren’t defined until run time Windows’ dlls (dynamic link library) why do this? –The segments are loaded into memory –The OS transfers control to the program and it runs

add $a1, $a1, $a1 add $v0, $zero, $zero add $t0, $zero, $zero outer: add $t4, $a0, $t0 lw $t4, 0($t4) add $t5, $zero, $zero add $t1, $zero, $zero inner: add $t3, $a0, $t1 lw $t3, 0($t3) bne $t3, $t4, skip addi $t5, $t5, 1 skip: addi $t1, $t1, 4 bne $t1, $a1, inner slt $t2, $t5, $v0 bne $t2, $zero, next add $v0, $t5, $zero add $v1, $t4, $zero next: addi $t0, $t0, 4 bne $t0, $a1, outer

a1 = a1 + a1 v0 = 0 t0 = 0 outer: t4 = a0 + t0 t4 = t4[0] t5 = 0 t1 = 0 inner: t3 = a0 + t1 t3 = t3[0] if(t3!=t4) goto skip t5 = t5 + 1 skip: t1 = t1 + 4 if(t1!=a1) goto inner t2 = (t5 < v0) if(t2!=0) goto next v0 = t5 + 0 v1 = t4 + 0 next: t0 = t0 + 4 if(t0!=a1) goto outer

a1 = a1 * 4 v0 = 0 t0 = 0 outer: t4 = a0[t0] t5 = 0 t1 = 0 inner: t3 = a0[t1] if( t3 == t4 ) t5++ t1 = t1 + 4 if(t1!=a1) goto inner if( t5 >= v0 ) v0 = t5 v1 = t4 t0 = t0 + 4 if(t0!=a1) goto outer

a1 = a1 * 4 v0 = 0 t0 = 0 while( t0 != a1 ) { t4 = a0[t0] t5 = 0 t1 = 0 while( t1 != a1 ) { t3 = a0[t1] if( t3 == t4 ) t5++ t1 = t1 + 4 } if( t5 >= v0 ) v0 = t5 v1 = t4 t0 = t0 + 4 }

a1 = a1 * 4 v0 = 0 t0 = 0 while( t0 != a1 ) { t5 = 0 t1 = 0 while( t1 != a1 ) { if( a0[t1] == a0[t0] ) t5++ t1 = t1 + 4 } if( t5 >= v0 ) v0 = t5 v1 = a0[t0] t0 = t0 + 4 }

maxCount = 0 i = 0 while( i != size ) { count = 0 j = 0 while( j != size ) { if( values[j] == values[i] ) count++ j++ } if( count >= maxCount ) maxCount = count v1 = values[i] i++ }

int size = 5000; int values[size]; int mode = 0; int modeCount = 0; int i,j,count; for( i = 0; i < size; i++ ) { count = 0; for( j = 0; j < size; j++ ) { if( values[i] == values[j] ) { count++; } if( count >= modeCount ) { modeCount = count; mode = values[i]; }

Assembly Language Architecture vs. Organization Machine language is the sequence of 1’s and 0’s that the CPU executes Assembly is an ascii representation of machine language A long long time ago, everybody programmed assembly Programmers that interface with the raw machine still use it –compiler/OS writers, hardware manufacturers Other programmers still need to know it –understand how the OS works –understand how to write efficient code

MIPS Instructions and Addressing Types of MIPS instructions –arithmetic operations (add, addi, sub) operands must be registers or immediates –memory operations lw/sw, lb/sb etc., only operations to access memory address is a register value + an immediate –branch instructions conditional branch (beq, bne) unconditional branch (j, jal, jr) MIPS addressing modes, –register, displacement, immediate, pc-relative, pseudodirect

Accessing Memory Memory is a big array of bytes and the address is the index Addresses are 32-bits (an address is the same as a pointer) A word is 4 bytes Accesses must be aligned

Representing Numbers Bits have no inherent meaning Conversion between decimal, binary and hex 2’s complement representation for signed numbers –makes adding signed and unsigned easy –flip the bits and add 1 to convert +/- floating point representation –sign bit, exponent (w/ bias), and significand (leading 1 assumed)

Instruction Formats The opcode (1 st six bits of instruction) determines which format to use R (register format) –add $r0, $r1, $r2 –[op, rs, rt, rd, shamt, func] I (immediate format) –lw $r0, 16($t0) –addi $r0, $t1, -14 –[op, rs, rt, 16-bit immediate] J (jump format) –jal ProcedureFoo –[op, address]

MIPS Registers Integer registers hold 32-bit values –integers, addresses Purposes of the different registers –$s0-$s7 –$t0-$t9 –$a0-$a3 –$v0-$v1 –$sp, $fp –$ra –$zero –$at –$k0-$k1 –$gp

Procedure Calls Calling the procedure is a jump to the label of the procedure –“jal ProcedureName” what happens? Returning from a procedure is a jump to the instruction after “jal ProcedureName” –“jr $ra” Arguments are passed in $a0-$a3 Return values are passed back in $v0-$v1 $t0-$t9 and the stack is used for local variables Registers are saved on the stack, but not automatically –if necessary, caller saves $t0-$t9, $a0-$a3, $ra –if necessary, callee saves $s0-$s7

Understanding Assembly Understand the subset of assembly that we’ve used, know what the instructions do Trace through assembly language snippets Assembly  C, recognize –while loops, if statements, procedure calls C  Assembly, convert –while loops, if statements, procedure calls

RISC vs. CISC Reduced Instruction Set Computer –MIPS: about 100 instructions –Basic idea: compose simple instructions to get complex results Complex Instruction Set Computer –VAX: about 325 instructions –Basic idea: give programmers powerful instructions; fewer instructions to complete the work

The VAX Digital Equipment Corp, 1977 Advances in microcode technology made complex instructions possible Memory was expensive –Small program = good Compilers had a long way to go –Ease of translation from high-level language to assembly = good

VAX Instructions Queue manipulation instructions: –INSQUE: insert into queue Stack manipulation instructions: –POPR, PUSHR: pop, push registers Procedure call instructions Binary-encoded decimal instructions –ADDP, SUBP, MULP, DIVP –CVTPL, CVTLP (conversion)

The RISC Backlash Complex instructions: –Take longer to execute –Take more hardware to implement Idea: compose simple, fast instructions –Less hardware is required –Execution speed may actually increase PUSHR vs. sw + sw + sw

How many instructions? How many instructions do you really need? Potentially only one: subtract and branch if negative ( sbn ) See p. 206 of your book