Integrated Receivers for the SKA Suzy Jackson (CSIRO ATNF – Macquarie)

Background Need for cheap receiver emerged from Luneburg Lens proposal. Project parameters developed in conjunction with Peter Hall (CSIRO/ISPO), Neil Weste (CISCO), Arnold van Ardenne (ASTRON) and Jeffrey Harrison (Macquarie). Development conducted as joint CSIRO/Macquarie PhD project. Currently unique international SKA project.

Project Rationale Similar receiver requirements identified across all SKA proposals –Large N small D – one receiver per element –Small N Large D – many receivers per antenna (Focal Plane Array) to meet Field of View requirements. Cheap highly integrated receivers thus SKA enabling technology “Generic” prototype useful internationally across wide range of demonstrators – SKAMP, NTD, EMBRACE…

CMOS for RF? Advantages: High integration levels Low wafer costs Low power Ability to integrate digital logic Strong industry cost & performance drivers (wireless networking, mobile phones) Detractors: Lossy substrate – poor quality passives Currently lower f T (higher noise) than GaAs & InP Less mature technology (modelling issues)

Noise Considerations T N(min) scales with f T. Newer processes promise higher f T, hence lower noise at given frequency. Deriving T N(min) for MOS transistors (Lee 1998):

CMOS Technology Trends

Implying (Disclaimers Apply)

Project Overview Design and construct 0.18µm RF-CMOS Integrated Receiver: RF frequency range 500 – 1700 MHz. T sys < 50K (uncooled). Instantaneous IF bandwidth 500 MHz. ~40dB (6 – 8 bits) dynamic range. Complete antenna to bits implementation. Ambitious specifications for CMOS technology.

Block Diagram

Some Results So Far LNA Using active noise cancelling for matching transistor (Bruccoleri 2004).

Next Steps Design & layout mixer, IF amps, IF filter, & sampler as individual components. 1 st wafer run end Integrate components. 2 nd wafer run mid-late Final product 2006.