COMP 1321 Digital Infrastructure

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Presentation transcript:

COMP 1321 Digital Infrastructure Richard Henson University of Worcester October 2018

Week 4: Programming a CPU – The Fetch-Execute Cycle Explain the instruction set required for a typical CPU Understand the sequential way a CPU uses its instruction set to run programs Understand how registers and memory addresses are used to process a CPU instruction and store the results

Programming a CPU! Overview: Back to Babbage and Lovelace… https://www.youtube.com/watch?v=FZGugFqdr60 Back to Babbage and Lovelace… CPU is a machine machines are stupid CPU needs instructions it can understand..

(identify & name components) The computer so far… (identify & name components) ip Data Memory Instruction Memory 1 4 mar

A couple of extra registers.. Memory Data Register Instruction Register Data Memory 1 4 1. 2 add ax,bx 2. 8 34 Instruction Memory Data Energize ax Energize bx Select ALU “add" 2 Address 34 Line of code goes in… Electrical bit signals come out

Moving data into Registers (ie from specified location) mov ax , [1] for example … Instruction Memory 1 2 mar 3 4 AX mov ax , [1] BX mov bx , [2] 5 mov bx , [2] 8 7 8 7 6 1

Moving data into Memory For example … mov [3] , ax Instruction Memory 1 2 mar 3 4 mov [0], bx AX mov [3] , ax BX 5 7 mov [0] , bx 8 7 8 7 6 8 1

8086 CPU family registers 8086 chip always used a 16-bit word SAM simulates an 8-bit word popular on most early microcomputers… Typical 8086 registers (stores): general purpose data: AX, BX, CX, DX specific use e.g. program counter (PC): instruction address in memory stack pointer SP): address of the top of the “stack”

Data and Addressing General purpose register contents… Convention: memory address that points to data Convention: data written as hexadecimal equivalent e.g. 4A memory location also has square brackets e.g. [4A]

CPU Instructions Used to tell the CPU what to do… MOV is for moving data around… MOV AX, 4A – move “4A” into AX register MOV AX, [4A] – move data contained in address 4A into AX register Many other instructions; range of operations… collectively known as an instruction set each CPU family has its own unique codes

8086 in practice Four 16-bit General Purpose registers each gen register (e.g. AX) can be read/written to upper (AH) & lower (AL) byte upper byte lower byte AX AH AL BX BH BL CX CH CL DX DH DL

Another 8086 Instruction: ADD Takes values from two registers Adds them together Deposits results back in one of the registers Which one? the register that appeared first e.g. “MOV, AX, BX” puts result in AX

Fetch-Execute Cycle (Organization and Control) 1. Fetch instruction from memory 5. Write back results to registers add ax , bx ax <- ALU 4. Do any Memory Access 2. Decode the instruction and read any registers (Data cache) ALU <- ax ALU <- bx None needed 3. Do any ALU operations (execute units) ax + bx

Fetch-Exec : State 1 Instruction Fetch 3 3 1 8 7 1 9 add ax , bx AX BX 1 4 3 2 add ax bx AX BX 3 add ax,bx 3 1 8 7 1 9

Fetch-Exec : State 2 Decode, Register Operations 3 3 1 8 7 3 1 1 9 add ax , bx 1 4 3 2 add ax bx AX BX 3 add ax,bx 3 1 8 7 3 1 1 9

Fetch-Exec : State 3 ALU Operation 3 8 7 3 1 4 1 9 add ax , bx AX BX 1 1 4 3 2 add ax bx AX BX 3 add ax,bx 8 1 7 3 4 1 9

Fetch-Exec : State 4 Memory Access 3 8 7 3 1 4 1 9 add ax , bx AX BX 1 1 4 3 2 add ax bx AX BX 3 add ax,bx 8 1 7 3 4 1 9

Fetch-Exec : State 5 Register Write 3 4 8 7 3 1 4 1 9 add ax , bx BX 1 1 4 3 2 add ax bx BX 3 add ax,bx 4 8 1 7 3 4 1 9

Fetch-Execute Cycle (Organization and Control) 1. Fetch instruction from memory 5. Write back results to registers mov ax , [1] Data into ax 4. Do any Memory Access 2. Decode the instruction and read any registers Read memory at addr ‘1’ Read the ‘1’ 3. Do any ALU operations (execute units) Put ‘1’ into MAR

Fetch-Exec : State 1 Instruction Fetch 3 8 7 1 9 mov ax , [1] 1 2 3 4 1 4 3 2 mov ax 1 mov ax , [1] 3 8 7 1 9

Fetch-Exec : State 2 Decode, Register Operations 3 8 7 1 9 mov ax , [1] 1 4 3 2 mov ax 1 mov ax , [1] 3 8 7 1 9

Fetch-Exec : State 3 ALU Operation 3 8 7 1 9 mov ax , [1] 1 1 2 3 4 1 4 3 2 mov ax 1 mov ax , [1] 3 8 7 1 1 9

Fetch-Exec : State 4 Memory Access 3 8 8 7 1 9 mov ax , [1] 1 1 2 3 4 1 4 3 2 mov ax 1 mov ax , [1] 3 8 8 7 1 1 9

Fetch-Exec : State 5 Register Write 3 8 8 8 7 1 9 mov ax , [1] 1 1 2 3 1 4 3 2 mov ax 1 mov ax , [1] 3 8 8 8 7 1 1 9

8088: Brains of the IBM PC

Inside the 8088 address bus address adder External buses gen registers ALU

1 Pentium (8086 family) 2 Fetch Decode ALU Mem Ops Reg Write 3 4 5

Intel Multi-core

Programming a CPU CPU programming code written as assembly language each family has its own instruction set Programming syntax depends on the CPU/instructions how they should be used Intel 8086 assembly language used for CPUs that support PC platforms

Example 8086 Assembly Language MOV AH,08 INT 21 MOV DL,AL MOV AH,02 MOV AH,4C

So THAT’S how it all works So THAT’S how it all works!  now you try it on SAM… Next week: a focus on writing programs and i/o