Static CMOS Circuits.

Slides:



Advertisements
Similar presentations
You have been given a mission and a code. Use the code to complete the mission and you will save the world from obliteration…
Advertisements

ECE555 Lecture 5 Nam Sung Kim University of Wisconsin – Madison
Advanced Piloting Cruise Plot.
Chapter 1 The Study of Body Function Image PowerPoint
1 Copyright © 2010, Elsevier Inc. All rights Reserved Fig 2.1 Chapter 2.
By D. Fisher Geometric Transformations. Reflection, Rotation, or Translation 1.
Business Transaction Management Software for Application Coordination 1 Business Processes and Coordination.
Jeopardy Q 1 Q 6 Q 11 Q 16 Q 21 Q 2 Q 7 Q 12 Q 17 Q 22 Q 3 Q 8 Q 13
Jeopardy Q 1 Q 6 Q 11 Q 16 Q 21 Q 2 Q 7 Q 12 Q 17 Q 22 Q 3 Q 8 Q 13
Title Subtitle.
My Alphabet Book abcdefghijklm nopqrstuvwxyz.
0 - 0.
DIVIDING INTEGERS 1. IF THE SIGNS ARE THE SAME THE ANSWER IS POSITIVE 2. IF THE SIGNS ARE DIFFERENT THE ANSWER IS NEGATIVE.
MULT. INTEGERS 1. IF THE SIGNS ARE THE SAME THE ANSWER IS POSITIVE 2. IF THE SIGNS ARE DIFFERENT THE ANSWER IS NEGATIVE.
Addition Facts
Year 6 mental test 5 second questions
ZMQS ZMQS
BT Wholesale October Creating your own telephone network WHOLESALE CALLS LINE ASSOCIATED.
Advance Nano Device Lab. Fundamentals of Modern VLSI Devices 2 nd Edition Yuan Taur and Tak H.Ning 0 Ch9. Memory Devices.
ABC Technology Project
3 Logic The Study of What’s True or False or Somewhere in Between.
Introduction to CMOS VLSI Design Combinational Circuits
Modern VLSI Design 3e: Chapter 3 Copyright 1998, 2002 Prentice Hall PTR Topics n Combinational logic functions. n Static complementary logic gate structures.
Digital Integrated Circuits© Prentice Hall 1995 Combinational Logic COMBINATIONAL LOGIC.
EE466: VLSI Design Lecture 7: Circuits & Layout
COMBINATIONAL LOGIC [Adapted from Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.]
CMOS Circuits.
Digital CMOS Logic Circuits
Chapter 10 Digital CMOS Logic Circuits
S.N.Bhat, Faculty, Dept. of E&C Engineering, M.I.T Manipal
Chapter 3 Logic Gates.
CMOS Logic Circuits.
Digital Logic Design Gate-Level Minimization
Introduction to Logic Gates
FPGA-Based System Design: Chapter 2 Copyright 2003 Prentice Hall PTR Gate Design n Static complementary logic gate structures. n Switch logic. n Other.
EE 414 – Introduction to VLSI Design
Transistors: Building blocks of electronic computing Lin Zhong ELEC101, Spring 2011.
©2004 Brooks/Cole FIGURES FOR CHAPTER 7 MULTI-LEVEL GATE CIRCUITS NAND AND NOR GATES Click the mouse to move to the next page. Use the ESC key to exit.
VOORBLAD.
Squares and Square Root WALK. Solve each problem REVIEW:
Chapter 5 Test Review Sections 5-1 through 5-4.
SIMOCODE-DP Software.
GG Consulting, LLC I-SUITE. Source: TEA SHARS Frequently asked questions 2.
Addition 1’s to 20.
25 seconds left…...
Week 1.
We will resume in: 25 Minutes.
1 Unit 1 Kinematics Chapter 1 Day
PSSA Preparation.
How Cells Obtain Energy from Food
ECE 424 – Introduction to VLSI
Modern VLSI Design: Chapter 3 Copyright  1998 Prentice Hall PTR Topics n Combinational logic functions n Static complementary logic gate structures.
Lecture #24 Gates to circuits
Combinational MOS Logic Circuit
Topics Combinational logic functions.
Modern VLSI Design 4e: Chapter 3 Copyright  2008 Wayne Wolf Topics n Combinational logic functions. n Static complementary logic gate structures.
Ratioed Circuits Ratioed circuits use weak pull-up and stronger pull-down networks. The input capacitance is reduced and hence logical effort. Correct.
Complementary CMOS Logic Style Construction (cont.) Digital Integrated Circuits© Prentice Hall 1995 Introduction.
FPGA-Based System Design: Chapter 2 Copyright  2003 Prentice Hall PTR Topics n Combinational logic functions. n Static complementary logic gate structures.
ECE442: Digital ElectronicsSpring 2008, CSUN, Zahid Static CMOS Logic ECE442: Digital Electronics.
STICK DIAGRAM EMT251. Schematic vs Layout In Out V DD GND Inverter circuit.
STICK DIAGRAM EMT251. Schematic vs Layout In Out V DD GND Inverter circuit.
Static CMOS Logic Seating chart updates
Solid-State Devices & Circuits
CMOS Logic Gates. NMOS transistor acts as a switch 2 When gate voltage is 0 V No channel is formed current does not flow easily “open switch” When gate.
Stick Diagrams Stick Diagrams electronics.
STICK Diagrams UNIT III : VLSI CIRCUIT DESIGN PROCESSES VLSI DESIGN
COMBINATIONAL LOGIC DESIGN
Chapter 6 (I) CMOS Layout of Complexe Gate
Presentation transcript:

Static CMOS Circuits

Static CMOS Circuits In Static CMOS circuits with n inputs, 2n transistors are needed. nMOS block is a dual of the pMOS block. What ever is in series in nMOS, appears in parallel in pMOS and vice versa. CMOS gates consume power only during the transition of inputs.

Static complementary gate structure Pull-up and pull-down networks VDD pull-up network out inputs Pull-down network VSS 7

Pull-up/pull-down network design Pull-up and pull-down networks are duals. To design one gate, first design one network, then compute dual to get other network. 13

Static CMOS Circuits Static CMOS Logic Structure Logic Gates – Inverter, NAND and NOR Complex Structures AOI/OAI Structures Stick Diagrams Layouts

Inverter 8

NAND Gate Va Vb Vout 1

NOR2 Gate Va Vb Vout 1

Static CMOS Circuits Static CMOS Logic Structure Logic Gates – Inverter, NAND and NOR Complex Structures AOI/OAI Structures Stick Diagrams Layouts

Complex CMOS Structures

Xor gate

Static CMOS Circuits Static CMOS Logic Structure Logic Gates – Inverter, NAND and NOR Complex Structures AOI/OAI Structures Stick Diagrams Layouts

AOI/OAI gates AOI = and/or/invert; OAI = or/and/invert. Implement larger functions. Pull-up and pull-down networks are compact: smaller area, higher speed than NAND/NOR network equivalents. 11

AOI example invert or and 12

Problems A C B D Y A B C D

Problems Design a CMOS circuit to implement the logic Y = A'B' + B'C + C'A Make a 2 input CMOS XOR gate to implement Y = A  B. CMOS XOR and XNOR gates are similar. Just one of the input pairs (A and A' are reversed).

Static CMOS Circuits Static CMOS Logic Structure Logic Gates – Inverter, NAND and NOR Complex Structures AOI/OAI Structures Stick Diagrams Layouts

Stick diagrams A stick diagram is a cartoon of a layout. Does show all components/vias (except possibly tub ties), relative placement. Does not show exact placement, transistor sizes, wire lengths, wire widths, tub boundaries.

Stick Diagram of NOR gate

Stores charge on inverter gate capacitance: Dynamic latch Stores charge on inverter gate capacitance:

Dynamic latch stick diagram VDD in out VSS phi phi’

Static CMOS Circuits Static CMOS Logic Structure Logic Gates – Inverter, NAND and NOR Complex Structures AOI/OAI Structures Stick Diagrams Layouts

Layout VDD D Q’ VSS f f’

Layout of NOR Gate

Stick Diagram of NAND gate