Chapter 12 : Field – Effect Transistors 12-1 NMOS and PMOS transistors 12-2 Load-line analysis of a simple NMOS amplifier 12-3 Small –signal equivalent circuits 12-4 Common source amplifiers 12-5 Source followers 12-6 CMOS logic gates

Chapter 12 : Field – Effect Transistors 12-1 NMOS and PMOS transistors 12-2 Load-line analysis of a simple NMOS amplifier 12-3 Small –signal equivalent circuits 12-4 Common source amplifiers 12-5 Source followers 12-6 CMOS logic gates

CMOS Logic –gate Circuits Combinatorial logic circuits

10. 3 CMOS Logic Gate Circuits 10. 3. 1 Basic structure Fig. 10 10.3 CMOS Logic Gate Circuits 10.3.1 Basic structure Fig. 10.8 Representation of a three- input CMOS logic gate

Fig. 10.10 Examples of pull –down networks (PDN)

Fig. 10.10 Examples of pull- up networks (PUN)

Fig. 10.11 Usual and alternative symbols for MOSFETs

10.3.2 The Two – Input NOR Gate Fig. 10.12 A two – input CMOS NOR gate

10.3.3 The Two- Input NAND Gate Fig. 10.13 A two-input CMOS NAND gate

10.3.4 A Complex Gate

10. 3. 5 Obtaining the PUN and the PDN and Vice Versa Fig. 10 10.3.5 Obtaining the PUN and the PDN and Vice Versa Fig. 10.14 CMOS realization of a complex gate

10. 3. 6 The Exclusive- OR Function Fig. 10 10.3.6 The Exclusive- OR Function Fig. 10.15 Realization of the exclusive –OR (XOR) function .

10.3.8 Transistor Sizing Fig. 10.16 Proper transistor sizing for a four- input NOR gate

Fig. 10. 17 Proper transistor sizing for a four- input NAND gate

Fig. 10.18 Circuit for Example 10.2