Morgan Kaufmann Publishers Computer Organization and Assembly Language

Slides:



Advertisements
Similar presentations
There are two types of addressing schemes:
Advertisements

Addressing modes The way in which an operand is specified is called the Address Mode.
ICS312 Set 6 Operands. Basic Operand Types (1) Register Operands. An operand that refers to a register. MOV AX, BX ; moves contents of register BX to.
Addressing modes – 1 The way in which an operand is specified is called the Address Mode.
The 8086 Assembly Programming Data Allocation & Addressing Modes
Addressing Modes Instruction – Op-code – Operand Addressing mode indicates a way of locating data or operands. – Any instruction may belong to one or more.
Microprocessor Systems Design I
Microprocessor Systems Design I Instructor: Dr. Michael Geiger Spring 2013 Lecture 4: 80386DX memory, addressing.
Riyadh Philanthropic Society For Science Prince Sultan College For Woman Dept. of Computer & Information Sciences CS 251 Introduction to Computer Organization.
CEN 226: Computer Organization & Assembly Language :CSC 225 (Lec#8) By Dr. Syed Noman.
CEG 320/520: Computer Organization and Assembly Language ProgrammingIntel Assembly 1 Intel IA-32 vs Motorola
An Introduction to 8086 Microprocessor.
1/2002JNM1 Positional Notation (Hex Digits). 1/2002JNM2 Problem The 8086 has a 20-bit address bus. Therefore, it can access 1,048,576 bytes of memory.
MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR1 Addressing Mode.
Computer Organization
Assembly Language. Symbol Table Variables.DATA var DW 0 sum DD 0 array TIMES 10 DW 0 message DB ’ Welcome ’,0 char1 DB ? Symbol Table Name Offset var.
Data Structures Covers Chapter 5, pages 144 – 160 and Chapter 6, pages 198 – 203.
Internal Programming Architecture or Model
I NTEL 8086 M icroprocessor بسم الله الرحمن الرحيم 1.
Addressing Modes Instruction – Op-code – Operand Addressing mode indicates a way of locating data or operands. – Any instruction may belong to one or more.
Computer Science 516 Intel x86 Overview. Intel x86 Family Eight-bit 8080, 8085 – 1970s 16-bit 8086 – was internally 16 bits, externally 8 bits.
Assembly language programming
Displacement (Indexed) Stack
Instruction set Architecture
Format of Assembly language
Presentation on Real Mode Memory Addressing
Data Transfers, Addressing, and Arithmetic
Microprocessor Systems Design I
Microprocessor Systems Design I
Chapter 11 Instruction Sets
Introduction to 8086 Microprocessor
COURSE OUTCOMES OF MICROPROCESSOR AND PROGRAMMING
16.317: Microprocessor System Design I
ADDRESSING MODES.
16.317: Microprocessor System Design I
Microprocessor Systems Design I
Microprocessor and Assembly Language
Alvaro Mauricio Peña Dariusz Niworowski Frank Rodriguez
ADDRESSING MODES.
William Stallings Computer Organization and Architecture 8th Edition
University of Gujrat Department of Computer Science
(The Stack and Procedures)
Assembly Lang. – Intel 8086 Addressing modes – 1
Chapter 3 Addressing Modes
Microprocessor and Assembly Language
Defining Types of data expression Dn [name] expression Dn [name]
Symbolic Instruction and Addressing
Introduction to Assembly Language
BIC 10503: COMPUTER ARCHITECTURE
Data Addressing Modes • MOV AX,BX; This instruction transfers the word contents of the source-register(BX) into the destination register(AX). • The source.
3.6 Data transfer Instructions
8086 Registers Module M14.2 Sections 9.2, 10.1.
Morgan Kaufmann Publishers Computer Organization and Assembly Language
Symbolic Instruction and Addressing
(Array and Addressing Modes)
ECEG-3202 Computer Architecture and Organization
(The Stack and Procedures)
Symbolic Instruction and Addressing
(Array and Addressing Modes)
Computer Architecture
Morgan Kaufmann Publishers Computer Organization and Assembly Language
CNET 315 Microprocessor & Assembly Language
Lecture 06 Programming language.
University of Gujrat Department of Computer Science
Chapter 6 –Symbolic Instruction and Addressing
(The Stack and Procedures)
Chapter 8: Instruction Set 8086 CPU Architecture
Part I Data Representation and 8086 Microprocessors
(The Stack and Procedures)
(Array and Addressing Modes)
Presentation transcript:

Morgan Kaufmann Publishers Computer Organization and Assembly Language September 17, 2018 CS 206 D Computer Organization and Assembly Language Chapter 1 — Computer Abstractions and Technology

Array and Addressing Modes

Lecture Outline Introduction Addressing Modes Register Indirect Mode Based and Indexed Addressing Modes

Introduction Introduction The way an operand is specified is known as its addressing mode. Addressing modes: Register mode Immediate mode Direct mode Register Indirect Based Indexed Based Indexed An operand is a register (ex. INC AX) An operand is a constant (ex. ADD A, 5) An operand is a variable(ex. ADD A, 5) Used with one dimensional arrays Address memory operands indirectly Used with two dimensional arrays Addressing Modes

Register Indirect Mode The offset address of the operand is contained in a register. I.e. The register acts as a pointer to the memory location. Format: [register] The register must be one of the following: BX SI DI BP The operand’s segment number is contained in DS The operand’s segment number is contained in SS

Memory Address Generation Physical Address (20 Bits) Adder Segment Register (16 bits) 0 0 0 0 Offset Value (16 bits) The physical memory addresses The Data Segment Memory Segment Register Offset Physical Address + DS: SI 05C0 0050 05C00H 05C50H DS:SI 00000H 0FFFFFH Data is usually fetched with respect to the DS register. The effective address (EA) is the offset. The EA depends on the addressing mode.

Register Indirect Mode Example 1: suppose that SI contains 0100h, and the word at 0100h contains 1234h. MOV AX, [SI] The CPU: 1. Examines SI and obtains the offset address 100h. 2. Uses the address DS:0100h to obtain the value 1234h. 3. Moves 1234h to AX. MOV AX, SI The CPU will move the value of SI, namely 100h, into AX. Addressing Modes

Register Indirect Mode Example 2: Write some code to sum in AX the elements of the 10-element array W defined by W DW 10,20,30,40,50,60,70,80,90,100 MOV AX, 0 ; AX holds sum LEA SI, W ; SI points to array W MOV CX, 10 ; CX has number of elements ADDNOS: ADD AX, [SI] ; sum = sum + element ADD SI, 2 ; move pointer to the next element LOOP ADDNOS ; loop until done

Based and Indexed Addressing Modes The operand’s offset address is obtained by adding a number called a displacement to the contents of a register. Displacement may be: The offset address of a variable. (ex. A) A constant (positive or negative). (ex. -2) The offset address of a variable + or - a constant. (ex. A + 4) Syntax: [register + displacement] [displacement + register] [register] + displacement displacement + [register] displacement [register] R opcode instruction Registers operand Memory A + Addressing Modes

Based and Indexed Addressing Modes The register must be one of the following: BX SI DI BP The addressing mode is called based if BX (base register) or BP (base pointer) is used. The addressing mode is called indexed if SI (source index) or DI (destination index) is used. The operand’s segment number is contained in DS The operand’s segment number is contained in SS Addressing Modes

Based and Indexed Addressing Modes Example 3: Suppose W is a word array, and BX contains 4 MOV AX, W[BX] The displacement is the offset address of variable W. The instruction moves the element at address W + 4 to AX. (this is the third element in the array) The instuction could also have been written in any of these forms: MOV AX, [W+BX] MOV AX, [BX+W] MOV AX, W+[BX] MOV AX, [BX]+W Addressing Modes

Based and Indexed Addressing Modes Example 4: . suppose SI contains the address of a word array W MOV AX, [SI+2] • The displacement is 2. • The instruction moves the contents of W + 2 to AX. (this is the second element in the array) • The instruction could also have been written in any of these forms: MOV AX, [2+SI] MOV AX, 2+[SI] MOV AX, [SI]+2 MOV AX, 2[SI] Addressing Modes

Based and Indexed Addressing Modes Example 5: Write some code to sum in AX the elements of the 10-element array W defined by W DW 10,20,30,40,50,60,70,80,90,100 XOR AX, AX ; AX holds sum. Can also use MOV AX,0 XOR BX, BX ; clear base register MOV CX, 10 ; CX has number of elements ADDNOS: ADD AX, W[BX] ; sum = sum + element ADD BX, 2 ; index next element LOOP ADDNOS ; loop until done Addressing Modes

Based and Indexed Addressing Modes Example6 Suppose that ALPHA is declared as ALPHA DW 0123H,0456H,0789H,0ABCDH In segment address by DS. Suppose also that BX contains 2 offset 0002 contains 1084 h SI contains 4 offset 0004contains 2BACh DI contains 1 What will be the result of following instructions: instruction NUMBER MOVED MOV AX,[ALPHA+BX] 0456H MOV BX,[BX+2] 2BACH MOV CX,ALPHA[SI] 0789H MOV AX,-2[SI] 1084H MOV BX,[ALPHA+3+DI] MOV AX,[BX]2 illegal Addressing Modes

Based and Indexed Addressing Modes Example7. Replace each lower case letter in the following string by it’s upper case equivalence. Use index addressing mode MSG DB ‘this is a message’ Solution: MOV CX,17 ; NO of chars in string XOR SI, SI ; clear SI indexes a char TOP: CMP MSG[SI],’ ‘ ;BLANK ? JE NEXT ; yes skip over AND MSG[SI],0DFH ; convert to upper case NEXT: INC SI ;Index next byte LOOP TOP ; loop until done Addressing Modes

Addressing modes Mode Meaning Pros Cons Implied Fast fetch Limited instructions Immediate Operand=A No memory ref Limited operand Direct EA=A Simple Limited address space Indirect EA=[A] Large address space Multiple memory ref Register EA=R Register indirect EA=[R] Extra memory ref Displacement EA=A+[R] Flexibility Complexity stack EA=stack top Limited applicability