清華大學電機系/通訊所 資電館625室 jmwu@ee.nthu.edu.tw 通訊系統晶片研究室 指導教授:吳仁銘 清華大學電機系/通訊所 資電館625室 jmwu@ee.nthu.edu.tw The lab is dedicated to the R&D of system-on-chip (SoC) approaches for digital communication systems. It covers system and VLSI design for all kinds of communication technologies. Research Area Wireless Communication Systems Wireless Communication System Performance Advanced Signal Processing for Mobile MIMO OFDM Baseband Communication Tx/Rx IC Design Specific Communication Systems: WiMAX, MB-OFDM UWB Rx GDSII Layout Over- Sampling & Decimation LPF Symbol Window Control Packet Detection Timing Estimation ADC Coarse carrier phase S/P Remove Guard Interval N-point FFT Freq Offset Data compensation Channel equalization P/S Signal De-mapping De- Interleaver Decoder LNA 2 N+L N D P 1 Decoded Information Bits Phase Recovery Offset Estimation RX Architecture Technology TSMC 0.18 1P6M Core size 1.587 x 1.588 mm2 Die size 2.217 x 2.218 mm2 Supply Voltage 1.8V Core Power Consumption 117 mW (Est) Max Work Frequency 30 MHz Number of I/O 74 Gate Count 191666 Multimedia Communication SoC with DSP Processor Switching Fabric IC Design DSP Microprocessor Arch H.264 codec MP3 decoder Load Balanced TDM Switch SerDes, PLL, CML I/O 8Ch Rx Digital 8Ch Tx