Computer Architecture Principles Dr. Mike Frank

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Presentation transcript:

Computer Architecture Principles Dr. Mike Frank CDA 5155 (UF) / CA 714-R (NTU) Fall 2002 Lecture #24 Thu., Oct. 17

Administrivia Assignment status: Midterm Exam: Today: HW#2 being returned today, Project 1 tomorrow. Project #2 – postponed until after midterm Midterm Exam: (on chs. 1-4, app. A, hws. 1-2, projs. 1-2) Oct. 22 (next Tue.) in class 5th+6th period 20% of your course grade! Today: Review session, Go over midterm guidelines in: http://www.cise.ufl.edu/class/cda5155fa02/MidtermGuidelines.doc

Midterm Preparation Advice Practice the sample exam questions: Last year’s sample midterm, midterm, sample final, final, make-up final. Will all be posted by tonight Sample solutions to all these will all be emailed by tomorrow night. Practice textbook exercises, even ones that were not assigned. Exam questions may be similar. Make a crib sheet with handy reference information. So you don’t have to search through the book during the exam.

Key Topics from Chapter 1 Technology trends, Moore’s Law. (1.2-1.4) IC cost and yield. (1.4) Performance metrics & comparisons. (1.5) Amdahl’s law & generalizations. (1.6) CPU Performance Equation (1.6)

Key Topics from Chapter 2 ISA classifications (load-store, etc.). (2.2) Memory addressing, addressing modes. (2.3) Control flow instruction types. (2.9) Instruction set encodings: Concepts.(2.5, 2.10) MIPS ISA: Format, operations (2.12) Load/stores, ALU ops, control instrs, FP ops.

Key Topics from Appendix A Simple RISC instruction execution cycle (A.1) RTL descriptions of stages (A.3) Simple RISC pipeline (A.3) Hazards: Structural, data, control (A.2) Stalls & impact on performance (A.2) Bypassing & forwarding (A.2) RAW/WAW/WAR hazards (A.4) Hazard detection mechanisms (A.3) Delayed branches, flushing, predict-(taken/not) (A.2)

Key Appendix A Topics, cont. Exceptions: Types, restart difficulties. (A.4) Multi-cycle operations, parallel execution paths (A.5) Latency & initiation interval (A.5) MIPS pipeline example (A.6) Dynamic scheduling w. scoreboarding (A.8)

Key Chapter 3 Topics Types of dependences: data/name/control (3.1) Relation to hazards (3.1) Dynamic scheduling w. Tomasulo’s alg. (3.2-3.3) Dynamic branch prediction (3.4-3.5) BPBs, correlating predictors (3.4) Branch target buffers (3.5) Multiple issue (3.6): Superscalar Statically scheduled superscalar (3.6) Dynamically scheduled superscalar, timing (3.7) Hardware-based speculation w. reorder buffers (3.7) Skip rest of ch. 3, from 3.8 onwards (for now).

Key Chapter 4 topics Static scheduling (4.1) Loop unrolling (4.1) Static multiple-issue loop unrolling (4.1) Static branch prediction (4.2) Static scheduling for VLIW (4.3) Software pipelining (4.3) Conditional/predicated instructions (4.5) Skip rest of ch. 4 for now.

Good Luck! I will hold extra office hours this afternoon from 2:15-5 pm in case you have questions. Also, ask them via email.