for the BI DOROS team (G. Baud, M. Gasior, M. Lasch, J. Olexa) DOROS system Jakub Olexa for the BI DOROS team (G. Baud, M. Gasior, M. Lasch, J. Olexa) 2017/05/11 - Technical board

Introduction (1) DOROS ( Diode ORbit and OScillation) is a BPM electronics system based on diode detectors. The system consist of DOROS front-ends built as 1U 19” boxes. The front-ends process 8 BPM electrode signals (2x collimator UP/DN button pairs or 2x dual plane BPMs) and send the results over Ethernet. DOROS was primarily designed for the LHC collimator BPMs and optimised for: precise beam orbit measurements for small beam offsets with sub-micrometre resolution; robustness and simplicity; orbit operation without external timings and prior adjustments. DOROS has been an operational system for the collimator BPMs since 2015. The system is evaluated on a few standard BPMs with potentially large beam offsets. The system measures: orbits; local betatron coupling and beta-beating with micrometre beam excitation. DOROS

Introduction (2) Signal processing is split into two subsystems optimized separately for high resolution orbit and high-sensitivity beam oscillation measurements Orbit sub-system – based on compensated diode detectors converting amplitudes of the short beam pulses from the BPM electrodes into DC signals, which are digitized with precision 24-bit ADCs. optimised for sub-micrometre resolution and micrometre precision no external timing needed for orbit measurements (auto-triggered by diodes) cost 1: limited bandwidth, currently to some 100 Hz (optimisation foreseen in 2017) cost 2: no bunch-by-bunch, measuring “average” position of all bunches over many turns (R&D on bunch gating “à la BBQ“ foreseen in 2017) Oscillation sub-system – analogue processing based on RF diode detectors (“à la BBQ“) demodulating the amplitude modulation of the beam pulses from the BPM electrodes. The DC content related to the beam offset is removed just after the detectors. This allows subsequent amplification of only the modulation related signals, resulting in a high detection sensitivity. optimised for processing of small beam oscillations in the bandwidth 0.05 – 0.5 frev cost 1: orbit information removed from the processing cost 2: signal amplitudes not in mm and changing with the beam intensity DOROS

DOROS signals processing Block diagram of two channels of a DOROS front-end processing signals from one pair of BPM electrodes Abbreviations: LPF – low-pass filter, TSG – test signal generator, PGA – programmable gain amplifier, FGA – fixed gain amplifier, CDD – compensated diode detector, DD – oscillation diode detector, OSP – oscillation signal processing. DOROS

Orbit diode detector Compensated diode detector consists of two diode peak detectors, one with single, second – with two diodes. In this configuration the diode forward voltage Vd is compensated and the output voltage Vo is equal to the input peak voltage Vi. The presented measurements were performed in the laboratory. The detectors were driven by RF amplifiers built with very fast current-feedback amplifiers. The input signal was 40 MHz 5 ns pulses. The compensation scheme does not work well for small amplitudes. The linearity for large amplitudes is limited by the slew rate of the RF amplifiers. DOROS

RF amplifiers Amplitudes of the signals at the inputs of the orbit detectors are maintained at optimal level by programmable gain RF amplifiers. It is the most complex analogue part of the DOROS front-end and required the longest development. Each channel consists of 4 attenuators, 5 fixed gain amplifiers and one programmable gain amplifier with 1 dB gain step. Each amplifier has at least 200 MHz bandwidth. Signal bandwidth is limited at the input to 80 MHz by non-reflective filters. The gain of the RF amplifiers can be changed from -12 dB to 68 dB in 1 dB steps covering an 80 dB dynamic range (in linear scale from 0.25 to 2500 in steps of 12 %, covering the dynamic range of four orders of magnitude). period 1: gains -¥ .. 0 dB (index 0 .. 25) period 2+3: 0 .. 20 dB (index 26 .. 47) period 4+5: gains 20 .. 40 dB (index 48 .. 69) period 6+7: gains 40 .. 60 dB (index 70 .. 91) period 8: gains 60 .. 70 dB (index 92 .. 102) overal gain stage 1 stage 2 stage 3 PGA gain index - ¥ bypass -5 10 26 20 48 40 70 60 92 -24 -10 -4 1 11 27 21 49 41 71 61 93 -23 -3 2 12 28 22 50 42 72 62 94 -22 -2 3 13 29 23 51 43 73 63 95 -21 -1 4 14 30 24 52 44 74 64 96 -20 5 15 31 25 53 45 75 65 97 -19 6 16 32 54 46 76 66 98 -18 7 17 33 55 47 77 67 99 -17 8 18 34 56 78 68 100 -16 9 19 35 57 79 69 101 -15 36 58 80 102 -14 37 59 81 -13 38 82 -12 39 83 -11 84 85 -9 86 -8 87 -7 88 -6 89 90 91 attenuation gain DOROS

Automatic gain control Gains of all four channels of one BPM or collimator are controlled in parallel. Gain control is based on the largest amplitude of all four electrodes. The gain is adjusted in 1 dB steps to cause the largest signal to have the amplitude in the green zone. The gain control levels and the hysteresis are programmable and can be changed according to actual beam conditions. DOROS

Automatic gain asymmetry cancelation measurement 1 measurement 2 The gain asymmetry of an RF amplifier channel pair is in the order of 1 %, even with the best available component tolerances (many components !). If not calibrated, the gain asymmetry of 1 % would cause substantial position errors. For example, for Q1 BPMs the error would be in the order of 150 µm. The actual gain asymmetry is different for each RF amplifier configuration (each 1 dB step). Periodic calibration switching (typically every 1 s) allows very efficient cancellation of the gain asymmetry and its dependency on the actual gain. One calibrated electrode amplitude is an average of each two consecutive simple values. With 1 s switching this results in one calibrated value every 1 s with 1 s delay. In the denominator only the gain errors are removed and the offset errors stay. The “denominator offset errors” have been identifier recently as a large contribution to the intensity-induced orbit errors for large beam offsets. It is proposed to compensate the “offset error” by a correction term α. Performance of this method will be evaluated in 2017. DOROS

Linearity of the orbit detectors Change in the signal amplitude (proportional to beam intensity) turns into false change in the orbit signal. The error increases with the orbit offset. An important contribution to the nonlinearity is the offset error in the denominator of the position calculation. The nonlinearity can be reduced (an order of magnitude) by compensating the “denominator error” by the α correction. For laboratory measurements α was found for two amplitudes at the boundaries of the typical operational range. Optimal α can be found by minimising the artificial position step caused by the amplitude change of the input signal (in practice induced by a controlled gain change). DOROS

Linearity correction on the beam data (off-line) DOROS

Oscillation sub-system Oscillation subsystem shares with the orbit part most of the RF processing. It is optimized for measuring small beam oscillations in 0.5 – 5 kHz frequency range (“à la BBQ“). Processed analogue signals of both H + V planes are sampled in parallel to the orbit signals with 24-bit ADCs at frev. ADC sampling clocks can be synchronised (separately for B1 and B2) to the BST turn clock. The sampling phase can be aligned in 100 ps steps to the beam turn clock recovered from the BPM signals. DOROS in a nutshell

Measurements based on driven beam oscillations Local betatron coupling Harmonic beam excitation at a separate frequency for each plane Beam signal demodulation at both frequencies for each plane From the four amplitudes and four phases the coupling amplitude and phase is calculated for the BPM location Betatron phase advance Harmonic beam excitation at a single frequency Beam oscillation phase evaluated for each BPM w.r.t. a common reference Phase advance between two BPMs calculated as the difference of the phases w.r.t. the common reference DOROS

DOROS front-end All DOROS front-ends are identical and they are distinguished only by their IDs The ID is a unique 16-bit number programmed manually with DIP switches (FPGA board) Each front-end has following I/O: 8 beam signal inputs (2x collimator UP/DN BPMs or 2x dual plane BPMs) 1 gigabit Ethernet link 2 optical receivers for BST B1 and B2 DOROS

DOROS data and control Data transmission Data sent as 1.5 kB UDP datagrams at 25 Hz rate (some 40 kB/s per front-end) synchronised to the BST “orbit trigger”, 4 destinations: 2 hardcoded IPs + 2 remotely configurable IPs. UDP payload contains: 8 BPM electrode amplitudes; front-end configuration (e.g. actual gains, modes of operation, auto-calibration settings, …); front-end ID, the HW / SW version, the UTC time stamp, the number of turns from the beam injection; 8 amplitudes and phases, demodulation results for 4 planes (H+V × 2 BPMs) and 2 frequencies; used for local coupling and phase advance measurement and valid only when beam is excited at precise and known frequencies, used in the front-ends for signal demodulation; phase measurement between the phase-adjusted BST turn clock and the turn clock recovered form beam signals; power statuses, power supply voltages, temperatures of 5 front-end PCBs; statuses of other front-end gear (e.g. BST, system PLLs, clock multiplexers…). The most important data is logged, the FE parameter logging in preparation LHC experiments receive DOROS orbits in DIP. New in 2017: Post-mortem buffering of the UDP data Data stored in front-end memory, B1 and B2 have independent buffers. The circular buffers can store 1.5 minutes of UDP data The post-mortem buffer start, readout and restart are controlled by FESA server over TCP protocol Front-end Control Commands from FESA are received as UDP datagrams. Accepting command UDPs only from the programmed IPs. Control status is reported through UDP data streaming, in parallel to the beam data. DOROS

DOROS Turn-by-turn data Data from the ADCs is stored locally in the front-end memory at the turn-by-turn rate. Separate buffering of the B1 and B2 data. Data available for each beam: 2 oscillation channels (H+V plane) used for local coupling and phase advance measurement; 4 electrode amplitudes used to calculate orbits and low frequency beam spectra. Each buffer can store some 2.3 million turns (some 3.7 minutes of turn-by-turn orbit + oscillation data). New in 2017: Oscillation and orbit data is stored always turn-by-turn. Data can be decimated upon request during readout. Two operation modes available: Capture: acquisition starts upon trigger and finishes after programmed number of turns; New in 2017: Buffer freeze: data is stored in circular buffers all the time and recording stops upon trigger. Then one can read from the buffers required number of turns. DOROS

DOROS installation of the AFP and Q7 front-ends in P1. DOROS installations DOROS is currently installed as an operational system on 21 LHC collimators with in-jaw BPMs: Collimator with BPMs in P1, P2, P5, P6, P7, P8 BBLR collimator with wire in P5 SPS prototype collimator in ECA5 DOROS is installed as a development system on 22 LHC standard BPMs: Q1 BPMs in P1, P2, P5, P8 Q7 BPMs in P1 AFP BPMs in P1 Signals from the standard BPM electrodes are divided into two paths with passive splitters, one part goes to the standard electronics and the second to a DOROS input. A few more front-ends installed in LHC and SPS for developments purposes. The front-ends are accompanied with 1U simple ventilation units to assure a small air flow. Each front-end dissipates about 40 W. Temperatures of the front-end PCBs are typically between 30 and 40 °C. DOROS installation of the AFP and Q7 front-ends in P1. DOROS

Radiation tolerant DOROS version New DOROS analogue electronics is being designed to tolerate radiation doses up to 750 Gy. Testing foreseen in the SPS. The test setup is built in the ALPS system sharing its input RF filters and optical link for data transmission and control. DOROS components are being tested for radiation tolerance. Most crucial components like GaAs switches, RF amplifiers, precision opamps already tested with very good results. More components like ADCs are in the waiting list for 2017. First 5 PCBs of the SPS analogue board are already produced. Collimator BPM electronics: Diode Orbit System

Plans for 2017: Collimator DOROS system New in 2017: Software interlocks on the orbit drifts in the collimator BPMs. Orbit measurement quality and reliability evaluated during 2016 run and considered as good for driving interlocks. Interlock settings proposed by the Machine Protection Team: Dump if upstream and downstream BPM readings are out of tolerance for 6 s If data on one BPM missing, no action, carry on with one BPM If no data, dump after 60 s If data coming, but with no valid orbits: dump after 60 s Work to be done before the interlocks are activated : FESA: Thoroughly check compatibility with the 2017 FPGA code FESA: Implementing FE parameter setting from scripts triggered by the LHC sequencer FESA: Automatic reloading of the FE settings upon its startup (after power cut or self power cycle) FESA: Handling of lost packets and gain switching (optimal orbit calculation with some missing data and masking invalid data) Work to be done during the year: FESA readout of the hardware post-mortem buffers (new in 2017) FESA handling of the “freeze mode” of the turn-by-turn buffers (new in 2017) These buffers could be frozen upon a post-mortem trigger to make available turn-by-turn orbit and oscillation data Studies on getting beam size from collimator scans Very promising calculations, simulations and beam data analysis by Apostolos MD beam measurements to be done in the 2017 run Supporting MDs for the BBLR project Purchasing critical components for DOROS production for “after LS2 collimator BPMs”. Current estimate: some 40 collimators (24 TSPM, 10 TCTPM, 5 TCLD), requiring some 40 DOROS FEs (including spares). DOROS

Plans for 2017: Standard BPM DOROS system The standard system will profit from the FPGA and FESA upgrades done for the collimator system (post-mortem buffers, freeze mode, scripts, exception handling, …) Studying with beam the linearity correction algorithm New in 2017: Increased bandwidth of the orbit detectors (by factor 10) Work on smooth change of the operation mode: slow switching, fast switching, no switching. Test software algorithm in the lab and then implement in FESA. Measure beam orbit spectra with increased bandwidth. Work on optimising this bandwidth (target: maximum without deteriorating the orbit measurement). Supporting MDs on: Q1 stripline directivity Optics measurement Low frequency “beam vibration” measurements Attempting bunch gating (“à la BBQ“), at least in the lab. If time permits, installing one FE in P5 for beam tests. SPS ALPS development: Testing the analogue board (5 PCBs in production) Continuing radiation testing of the components for the ADC board Designing, producing and testing the ADC board DOROS

Spare slides DOROS

Why diode detectors ? Diode detectors can be used to convert fast beam pulses from a BPM into slowly varying signals, much easier to digitise with high resolution. In this way amplitudes of ns pulses can be measured with a lab voltmeter. As the diode forward voltage Vd depends on the diode current and temperature, the output voltage of a simple diode detector also depends on these factors. The detector output voltage can be proportional to the peak amplitude or an amplitude average of the input pulses. Input (Vi) and output (Vo) voltages of a peak detector with an ideal diode Input (Vi) and output (Vo) voltages of a peak detector with a real diode Input (Vi) and output (Vo) voltages of an average-value detector DOROS

Simple diode detectors Charge balance equation for the following assumptions: a simple diode model with a constant forward voltage Vd and a constant series resistance r. constant charging and discharging current, i.e. output voltage changes are small w.r.t. the input voltage. A numerical example: LHC, one bunch. For LHC τ ≈ 1 ns and T ≈ 89 μs, so for Vo ≈ Vi one requires R/r > T/τ. Therefore, for r ≈ 100 Ω, R > 8.9 MΩ. Vi Vd n bunches For large T to τ rations peak detectors require large R values and a high input impedance amplifier, typically a JFET-input operational amplifier. The slowest capacitor discharge is limited by the reverse leakage current of the diode (in the order of 10 nA for RF Schottky diodes). DOROS

Simple diode detectors for BPM signals One diode detector for each BPM electrode. Subtracting signals before the detectors (e.g. by a 180° hybrid) is no good, as the resulting signals would be: smaller (→ larger nonlinearities); changing signs when crossing the BPM centre. The diode forward voltage Vd introduces a significant position error. Vd depends on the diode current and temperature. Simple diode detectors are good for applications when the signal amplitude is not that important. Two examples: Tune measurement systems An LHC safety system: Beam Presence Flag DOROS

Compensated diode detector Compensated diode detector consists of two diode peak detectors, one with single, second – with two diodes. All three diodes are in one package, for good thermal coupling and symmetry of the forward voltages Vd. Two operational amplifiers are used to derive 2 Vd voltage and to add it to the output of the two-diode detector. This way the resulting output voltage is equal to the input peak voltage. This is the simpler and most promising scheme, found in a very popular text book on electronics. To get an “ultimate peak mode operation”, the discharge resistors can be omitted. In this case the discharge is done by the reverse leakage current of the diodes. The asymmetry in the charging conditions becomes less important for larger input voltages. BPM Signal Processing with Diode Detectors