Memory Management & Virtual Memory. Hierarchy Cache Memory : Provide invisible speedup to main memory.

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Presentation transcript:

Memory Management & Virtual Memory

Hierarchy Cache Memory : Provide invisible speedup to main memory

Hierarchy Virtual Memory : Provide invisible extension to main memory

Memory Management – Turns Logical addresses used by processor into physical addresses in memory

Terminology Virtual/Logical Address : – Address program uses – Size determined by bits in memory address Physical Address : – Determined by available memory

Virtual Memory How Why? – Logical space can be independent of physical space – Programs don't have to care about hardware

Virtual Memory Why? – Allow programs to use more main memory than is physically present

Virtual Memory How Why? – Allows multiple programs to coexist

Virtual Memory How Why? – Allows multiple programs to coexist Everyone can use same logical addresses

Virtual Memory How Why? – Allows multiple programs to coexist invisibly Some memory can be shared by processes

Virtual Memory How Why? – Allows multiple programs to coexist invisibly Memory Management Unit can prevent access to unowned memory

Terminology Page : block of memory in logical address space Page Frame : location in physical memory a page is placed

Terminology Page Fault : request for a page that is not in physical memory Paging : copying desired page from hard drive to RAM I need this address:

Terminology Page Fault : request for a page that is not in physical memory Paging : copying desired page from hard drive to RAM I need this address: Bring in from hard drive

Terminology Page Fault : request for a page that is not in physical memory Paging : copying desired page from hard drive to RAM I need this address: Bring in from hard drive Record where I put it 3

Process 24 bit addresses – 2^16 = 16 MB logical address space

Process 24 bit addresses – 2^24 = 16 MB logical address space Pages will be 64Kb – 2^16 bytes in page – 16 bit address inside page

Process 24 bit addresses – 2^24 = 16 MB logical address space Pages will be 64Kb – 2^16 bytes in page – 16 bit address inside page 256 pages of memory – 2^24 / 2^16 = 2^8 – Page table has 256 entries

Process 24 bit addresses – 2^24 = 16 MB logical address space Pages will be 64Kb – 2^16 bytes in page – 16 bit address inside page 256 pages of memory – 2^24 / 2^16 = 2^8 – Page table has 256 entries 512 KB physical memory – 512 K / 64 K = 8 – 8 page frames of physical memory – 3 bit frame addresses

Need logical address Process

Need logical address Break into: – Logical page – Address inside page

Process Need logical address Break into: – Logical page – Address inside page Lookup page in page table – Page is resident (in memory) – At 110

Process Need logical address Break into: – Logical page – Address inside page Lookup page in page table – Page is resident (in memory) – At frame address 110 Create physical address from frame + offset –

Page Sizes Small page size = larger page table

Page Sizes Small page size = larger page table Large page size = more unused data in pages

Paging & Caching Page table held in main memory by OS

Paging & Caching Page table held in main memory by OS Every mapping goes to main memory… Cache is worthless!

TLB Transition look-aside buffer Cache for page table – Subset of page table – Fully associative – May be multiple levels