NOISE MEASUREMENTS ON CLICPIX AND FUTURE DEVELOPMENTS Pierpaolo Valerio

Outline  Noise issues with the CLICpix demonstrator  A new CLICpix redesign  Conclusions 2

Outline  Noise issues with the CLICpix demonstrator  A new CLICpix redesign  Conclusions 3

Clock frequency dependency 4  S-curve measurements showed a dependency from the clock frequency used for the acquisition  In principle, the clock frequency should have almost no effect on the number of counted pulses

A sum of multiple effects 5 Two main effects are visible:  There is a shift in the observed threshold for different clock frequencies…  … although the position of the noise pedestal remains constant  At the lowest clock frequency there is a large increase in noise only for pixels in odd-numbered columns

Test pulse variation 6  After some tests and simulations, the culprit of the first effect was found to be the way test pulses are produced  A capacitor inside each pixel is used to switch between local ground and an external biasing, in order to inject a controlled charge  The external bias is referred to an external ground. The chip ground changes by ~3 mV due to the difference in power consumption when the clock frequency changes

Test pulse offset 7  On top of this change, we also discovered a fixed offset in the charge being injected when the test pulse was activated (a 0 V test pulse produced a non-zero output)  This effect is due to injected charge (~300 e - ) from the switches controlling the test pulse capacitor  Simulations confirmed this theory  The problem can be easily circumvented by offsetting the test pulse DAC output by ~18 mV

Noise injection 8  The increased noise in odd-numbered columns was found to be due to noise injected from the digital circuitry  Pixels in odd and even columns are laid out in the same way, so signal which are close to the digital part in one column are far from it on the adjacent ones  Simulations were performed to identify which node was critical to this effect

Noise injection 9  The output of the second stage of the discriminator is routed near the digital side  Simulations show injection in this node  The reduction of this effect for higher clock frequencies may be due to a filtering due to the long metal lines it couples to

Noise map 10  A noise map was calculated from the S-curve measurements using test pulses and a 100 MHz clock  Some striping is still visible, but the difference is much lower than at lower clock speeds  The average noise value is 55 e -, with a 5.7 e - standard deviation

Outline  Noise issues with the CLICpix demonstrator  A new CLICpix redesign  Conclusions 11

Redesign features 12 A newer version of CLICpix is in the works. Its main features will be:  Bigger pixel matrix (256x256)  Counter depth increase  On-board LDO  PLL, band-gap blocks  Daisy chain logic  Bug fixes

Modification of the analog pixels 13  Mirroring the analog front-end would reduce its total area by reusing a part of it for two adjacent pixels  It would at the same time solve the noise injection issue Feedback current mirror

Counter depth choice 14  The area freed by the analog part can be used for an additional row of digital cells. I tried re- implementing the digital logic with the new constraints  The TOA counter can be increased to 5 bits (from 4) in order to increase its dynamic range  The TOT counter can be increased to 7 bits (from 4) using the remaining space  We could also decide to have only one 5 bits TOA counter for every two pixels: in this case the TOT counter can go up to 10 bits

Outline  Noise issues with the CLICpix demonstrator  A new CLICpix redesign  Conclusions 15

 Noise effects in CLICpix have been investigated and (mostly) understood  All issues found can be worked around in the current implementation and can be solved in a redesign  The design of an enhanced (and larger) version of CLICpix has started and some improvements has been studied  Final specifications need to be discussed Conclusions 16

Thanks for your attention