Lecture 07 Digital logic By Amr Al-Awamry. 4 variables K-Map.

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Presentation transcript:

Lecture 07 Digital logic By Amr Al-Awamry

4 variables K-Map

Example 1

Example 2

PRODUCT-OF-SUMS SIMPLIFICATION DeMorgan’s

Don’t Care Terms Functions that have unspecified outputs for some input combinations are called incompletely specified functions. In most applications, we simply don’t care what value is assumed by the function for the unspecified minterms. For this reason, it is customary to call the unspecified minterms of a functio don’t-care conditions. X -Term

Example

Example Cont. 1 st Solution2 nd Solution

NAND AND NOR IMPLEMENTATION A convenient way to implement a Boolean function with NAND gates is to obtain the simplified Boolean function in terms of Boolean operators and then convert the function to NAND logic.

Two-Level Implementation The implementation of Boolean functions with NAND gates requires that the functions be in sum-of-products form.

Example 2

Example 2 cont

The procedure described in the previous example indicates that a Boolean function can be implemented with two levels of NAND gates. 1. Simplify the function and express it in sum-of-products form. 2. Draw a NAND gate for each product term of the expression that has at least two literals. The inputs to each NAND gate are the literals of the term. This procedure produces a group of first-level gates. 3. Draw a single gate using the AND-invert or the invert-OR graphic symbol in the second level, with inputs coming from outputs of first-level gates. 4. A term with a single literal requires an inverter in the first level. However, if the single literal is complemented, it can be connected directly to an input of the secondlevel NAND gate.

Multilevel NAND Circuits The most common procedure in the design of multilevel circuits is to express the Boolean function in terms of AND, OR, and complement operations. The function can then be implemented with AND and OR gates

Example

Multi Level general procedure 1. Convert all AND gates to NAND gates with AND-invert graphic symbols. 2. Convert all OR gates to NAND gates with invert-OR graphic symbols. 3. Check all the bubbles in the diagram. For every bubble that is not compensated by another small circle along the same line, insert an inverter (a one-input NAND gate) or complement the input literal.