COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Yaohang Li.

Slides:



Advertisements
Similar presentations
1 Lecture 3: MIPS Instruction Set Today’s topic:  More MIPS instructions  Procedure call/return Reminder: Assignment 1 is on the class web-page (due.
Advertisements

Goal: Write Programs in Assembly
Lecture 5: MIPS Instruction Set
1 ECE462/562 ISA and Datapath Review Ali Akoglu. 2 Instruction Set Architecture A very important abstraction –interface between hardware and low-level.
CS1104 – Computer Organization PART 2: Computer Architecture Lecture 5 MIPS ISA & Assembly Language Programming.
ELEN 468 Advanced Logic Design
Systems Architecture Lecture 5: MIPS Instruction Set
Chapter 2 Instructions: Language of the Computer
Chapter 2 Instructions: Language of the Computer Part III.
CS2100 Computer Organisation MIPS Part III: Instruction Formats (AY2014/2015) Semester 2.
MIPS Architecture CPSC 321 Computer Architecture Andreas Klappenecker.
ECE 15B Computer Organization Spring 2010 Dmitri Strukov Lecture 4: Arithmetic / Data Transfer Instructions Partially adapted from Computer Organization.
Computer Architecture CPSC 321 E. J. Kim. Overview Logical Instructions Shifts.
1 Lecture 2: MIPS Instruction Set Today’s topic:  MIPS instructions Reminder: sign up for the mailing list cs3810 Reminder: set up your CADE accounts.
The Processor 2 Andreas Klappenecker CPSC321 Computer Architecture.
Lecture 5 Sept 14 Goals: Chapter 2 continued MIPS assembly language instruction formats translating c into MIPS - examples.
Lecture 4 Sept 9 Goals: Amdahl’s law Chapter 2 MIPS assembly language instruction formats translating c into MIPS - examples.
ECE 15B Computer Organization Spring 2010 Dmitri Strukov Lecture 6: Logic/Shift Instructions Partially adapted from Computer Organization and Design, 4.
Instruction Representation I (1) Fall 2005 Lecture 05: INSTRUCTION REPRESENTATION.
COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji.
CS 300 – Lecture 6 Intro to Computer Architecture / Assembly Language Instructions.
ISA-2 CSCE430/830 MIPS: Case Study of Instruction Set Architecture CSCE430/830 Computer Architecture Instructor: Hong Jiang Courtesy of Prof. Yifeng Zhu.
C OMPUTER O RGANIZATION AND D ESIGN The Hardware/Software Interface 5 th Edition Chapter 2 Instructions: Language of the Computer.
CMPT 334 Computer Organization
CMPE 325 Computer Architecture II Cem Ergün Eastern Mediterranean University Integer Representation and the ALU.
Lecture Objectives: 1)Define the terms least significant bit and most significant bit. 2)Explain how unsigned integer numbers are represented in memory.
CS224 Fall 2011 Chap 2a Computer Organization CS224 Fall 2011 Chapter 2 a With thanks to M.J. Irwin, D. Patterson, and J. Hennessy for some lecture slide.
CSE378 Instr. encoding.1 Instruction encoding The ISA defines –The format of an instruction (syntax) –The meaning of the instruction (semantics) Format.
Lecture 4: MIPS Instruction Set
IFT 201: Unit 1 Lecture 1.3: Processor Architecture-3
Chapter 2 CSF 2009 The MIPS Assembly Language: Introduction to Binary System.
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /08/2013 Lecture 10: MIPS Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE CENTRAL STATE.
Chapter 2 CSF 2009 The MIPS Assembly Language. Stored Program Computers Instructions represented in binary, just like data Instructions and data stored.
Lecture 2: Advanced Instructions, Control, and Branching EEN 312: Processors: Hardware, Software, and Interfacing Department of Electrical and Computer.
Computer Organization CS224 Fall 2012 Lessons 7 and 8.
EET 4250 Instruction Representation & Formats Acknowledgements: Some slides and lecture notes for this course adapted from Prof. Mary Jane Penn.
Chapter 2 — Instructions: Language of the Computer — 1 Memory Operands Main memory used for composite data – Arrays, structures, dynamic data To apply.
DR. SIMING LIU SPRING 2016 COMPUTER SCIENCE AND ENGINEERING UNIVERSITY OF NEVADA, RENO Session 9 Binary Representation and Logical Operations.
DR. SIMING LIU SPRING 2016 COMPUTER SCIENCE AND ENGINEERING UNIVERSITY OF NEVADA, RENO Session 7, 8 Instruction Set Architecture.
Computer Organization Instructions Language of The Computer (MIPS) 2.
Chapter 2 Instructions: Language of the Computer Part IIa Number Representation.
CS Computer Organization Numbers and Instructions Dr. Stephen P. Carl.
Chapter 2 Instructions: Language of the Computer.
COMPUTER ARCHITECTURE & OPERATIONS I
Morgan Kaufmann Publishers
Lecture 4: MIPS Instruction Set
ELEN 468 Advanced Logic Design
The University of Adelaide, School of Computer Science
Computer Architecture & Operations I
Lecture 4: MIPS Instruction Set
The University of Adelaide, School of Computer Science
MPIS Instructions Functionalities of instructions Instruction format
MISP Assembly.
CSCI206 - Computer Organization & Programming
The University of Adelaide, School of Computer Science
Systems Architecture Lecture 5: MIPS Instruction Set
Computer Architecture & Operations I
The University of Adelaide, School of Computer Science
ECE232: Hardware Organization and Design
The University of Adelaide, School of Computer Science
Chapter 2 Instructions: Language of the Computer
Instruction encoding The ISA defines Format = Encoding
The University of Adelaide, School of Computer Science
Computer Architecture
Instruction encoding The ISA defines Format = Encoding
UCSD ECE 111 Prof. Farinaz Koushanfar Fall 2018
Instruction encoding The ISA defines Format = Encoding
MIPS Instruction Set Architecture
MIPS Assembly.
Instruction encoding The ISA defines Format = Encoding
Presentation transcript:

COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Yaohang Li

Review Last Class Operands Register Operands Memory Operands Immediate Operands This Class Binary Integers Unsigned Signed Signed Extension Representation of MIPS Instructions R-format I-format Next Class Assignment 4 Conditional Instructions

Unsigned Binary Integers Given an n-bit number Range: 0 to +2 n – 1 Example = 0 + … + 1× ×2 2 +1×2 1 +1×2 0 = 0 + … = Using 32 bits 0 to +4,294,967,295

2s-Complement Signed Integers Given an n-bit number Range: –2 n – 1 to +2 n – 1 – 1 Example = –1× × … + 1×2 2 +0×2 1 +0×2 0 = –2,147,483, ,147,483,644 = –4 10 Using 32 bits –2,147,483,648 to +2,147,483,647

2s-Complement Signed Integers Bit 31 is sign bit 1 for negative numbers 0 for non-negative numbers 2 n – 1 can’t be represented Non-negative numbers have the same unsigned and 2s-complement representation Some specific numbers 0: … 0000 –1: … 1111 Most-negative: … 0000 Most-positive: … 1111

Signed Negation Complement and add 1 Complement means 1 → 0, 0 → 1 Example: negate = … –2 = … = …

Sign Extension Representing a number using more bits Preserve the numeric value In MIPS instruction set addi : extend immediate value lb, lh : extend loaded byte/halfword beq, bne : extend the displacement Replicate the sign bit to the left c.f. unsigned values: extend with 0s Examples: 8-bit to 16-bit +: => –: =>

Representing Instructions Instructions are encoded in binary Called machine code MIPS instructions Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register numbers, … Regularity! Register numbers $t0 – $t7 are reg’s 8 – 15 $t8 – $t9 are reg’s 24 – 25 $s0 – $s7 are reg’s 16 – 23 §2.5 Representing Instructions in the Computer

R-Format and I-Format

MIPS R-format Instructions Instruction fields op: operation code (opcode) rs: first source register number rt: second source register number rd: destination register number shamt: shift amount (00000 for now) funct: function code (extends opcode) oprsrtrdshamtfunct 6 bits 5 bits

R-format Example add $t0, $s1, $s2 R-format$s1$s2$t00add = oprsrtrdshamtfunct 6 bits 5 bits

Hexadecimal Base 16 Compact representation of bit strings 4 bits per hex digit c d a1010e b1011f1111 Example: eca

MIPS I-format Instructions Immediate arithmetic and load/store instructions rt: destination or source register number Constant: –2 15 to – 1 Address: offset added to base address in rs oprsrtconstant or address 6 bits5 bits 16 bits

In Class Exercises Convert the following MIPS instructions into Machine Instructions ADD $t1, $t2, $t1 ADDI $t5, $s3, 5 LW $t4, 200($s3)

In Class Exercises (Answers) Convert the following MIPS instructions into Machine Instructions ADD $t1, $t2, $t3 R-format$t2$t3$t10add

In Class Exercises (Answers) Convert the following MIPS instructions into Machine Instructions ADDI $t5, $s3, 5 I-format$s3$t

In Class Exercises (Answers) Convert the following MIPS instructions into Machine Instructions LW $t4, 200($s3) I-format$s3$t

Design Principle 4: Good design demands good compromises Different formats complicate decoding, but allow 32-bit instructions uniformly Keep formats as similar as possible

Stored Program Computers Instructions represented in binary, just like data Instructions and data stored in memory Programs can operate on programs e.g., compilers, linkers, … Binary compatibility allows compiled programs to work on different computers Standardized ISAs The BIG Picture

Logical Operations Instructions for bitwise manipulation OperationCJavaMIPS Shift left<< sll Shift right>>>>> srl Bitwise AND&& and, andi Bitwise OR|| or, ori Bitwise NOT~~ nor Useful for extracting and inserting groups of bits in a word §2.6 Logical Operations

Shift Operations shamt: how many positions to shift Shift left logical Shift left and fill with 0 bits sll by i bits multiplies by 2 i Shift right logical Shift right and fill with 0 bits srl by i bits divides by 2 i (unsigned only) oprsrtrdshamtfunct 6 bits 5 bits

AND Operations Useful to mask bits in a word Select some bits, clear others to 0 and $t0, $t1, $t $t2 $t $t0

OR Operations Useful to include bits in a word Set some bits to 1, leave others unchanged or $t0, $t1, $t $t2 $t $t0

NOT Operations Useful to invert bits in a word Change 0 to 1, and 1 to 0 MIPS has NOR 3-operand instruction a NOR b == NOT ( a OR b ) nor $t0, $t1, $zero $t $t0 Register 0: always read as zero

Summary Binary Integers Unsigned Signed Signed Extension Representation of MIPS Instructions R-format I-format

What I want you to do Review Chapter 2