Preliminary Design of Trigger System for BES III Zhen’an LIU Inst of High Energy Physics,Beijing Oct

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 2 Outline Introduction Estimation of event rate The principle of BESIII trigger Subsystems Description Summary

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 3 Introduction BEPCI: low luminosity(3  cm -2 s -1 ). Single bunch mode bunch separation: 800ns trigger:latch-process-decision BEPCII BESIII BEPCII: double ring high luminosity(10 33 cm -2 s -1 ). multi-bunch mode bunch separation 8ns TRIGGER FOR BESII CAN NOT BE USED IN BESIII

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 4 Introduction(2) BES III: new vertex detector new MDC new TOF new EMC(barrel BGO endcap CsI) superconducting magnet new muon counter new FEE for all subdetectors

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 5 A NEW TRIGGER SYSTEM MUST BE DESIGNED !

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 6 Estimation of event rate Good physics events ( J/ ,  at BEPCII/BESIII ) Bhabha and radiative Bhabha scattering Machine background Coulomb scattering, Bremsstrahlung with residual gas Touscheck scattering Cosmic Ray background Purpose: To accept all interested events To rejects as much background as possible

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 7 Background from Lost particles

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 8 Background from Lost particles

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 9 Machine background Intensity: I BEPCII = ( ) A, ( 1.1  e ) ( 40  I BEPC ) Lifetime:  BEPCII = 3.5~3.8 hr (0.5   BEPC ) Lost rate: (dn/dt) BEPCII = 8.7  10 8 /s (80  dn/dt BEPC ) Lost rate(BESIII): (dn/dt) BESIII  1.3  10 7 /s  N beam-BEPCII = 13MHz (80  N beam-BEPC )

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 10 BG measurement of MDC in BES2

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 11 Machine background BEPC/BESII 15Hz at DAQ Single wire of 1st layer of MDC BEPCII/BESIII 30KHz on single MDC wire at R=17cm 1500 Hz (DAQ) Fig:Backgrounds rate vs beam current

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 12 Flux Beijing =170 m -2 s -1 N =1500 /s BESI/II: T window = 40 ns 95% suppressed N cosmic = 1 Hz Cosmic ray background BESIII: No time window similar geometrical size to BESI/II Same # of cosmic rays hitting on BESIII Using Vertex counter N cosmic = 20 Hz

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 13 Good physics +Bhabha events Luminosity L BEPCII = 1  cm -2 s -1 Optimized to J/  and  energy N J/  = 1500 Hz N  ´ = 420 Hz N BB = £   BB = 550 Hz (| cos  |< 0.95)

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 14 Total event rate = good event rate + cosmic event rate + bhabha rate + machine background rate = ~ 3000 Hz

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 15 The principle of BESIII trigger Trigger requirement no dead time or small total dead time Flexibility Constraints from BEPCII 93 bunches in the ring (8 ns separation) Latch-process-decision mode not possible in 8ns Pipeline must be used in FEE & trigger

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 16 Trigger pipeline Constraints due to Detectors T drift MDC = 500 ns(C 3 H 8 + small cell), signals from different collisions mixed together Trigger pipeline clock: RF division (f RF =499.8MHz) 20MHz (f RF /24) all trigger promitives are processed every 50ns Trigger latency

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 17 The principle of BESIII trigger(2) Hardware trigger + software filter(L2) FEE signal splitted: trigger + FEE pipeline Trigger pipeline clock 20MHz Level 1(L1): 2.4  s FEE Control Logic checks L1 with pipeline clock L1 YES: moves pipeline data to readout buffer L1 No : overwritten by new data Detector switch BESIII FEE pipeline and Data flow Level 1 FEE pipeline Readout buffer Farms Disk Time Reference 0 s 2.4  s Ev.Filter (L2)

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 18 Global Trigger Logic 2.4  s Schematic of BES III Trigger VC TOF MDC EMC MU DISC Mu track DISC BTE Sum Hit Count Track Finder Tile Processor Total Ener Sum Hit/Seg Count Track Seg. Finder L0 trigger Logic DAQ RF TTC Tile Sum FEE L1P L0P CLOCK

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 19 Subsystem Description MDC Trigger EMC Trigger Trigger Timing and Control Global Trigger Logic

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 20 Trigger for MDC MDC: 5740 wires, 36 layers in 9 super- layers 6 stereo superlayers 3 axial superlayers Trigger: Axial superlayers for trigger P T > 150 MeV step1: track segment finding step 2:track-finding

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 21 Track Segment Finder Reference layer: second layer in each super-layers Segment definition 3/4 logic in a superlayers Track segments: Superlayer 1: 66 Superlayer 2: 162 superlayer 3: 192 superlayer Track finder Reference Segment: second superlayer (track reference: 162) Track definition all 4 segments in 4 superlayers MDC Tracking

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 22 Track Segment finding

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 23 MDC track combination MC Calculation MC Private code random P( GeV), initial angle in phi B = 1.0 T Ask for all superlayers with segment hit combinations for each reference segment ~ 117 realization with CPLD or FPGA

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 24 EMC(Barrel) trigger BEMC: BGO crystals 88 rings along Z 44 rings with 240 crystals(inner) 44 rings with 200 crystals(outer)

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 25  Tile:30(  )  22(z) Z TILE:25(  )  22(z) BTE:25cells BTE:30cells Totoal Energy Trigger: sum of all tile signals thresholds Segmentation: 8(  )  4(z) = 32 segments Vthl and Vthh No. Of segments Event time Basic Trigger element(BTE): BTE1:FEE sum of 30 cells BTE2:FEE sum of 25 cells Tile: Tile1:sum of 23 BTE’s Tile2:sum of 23 BTE’s EMC(Barrel) Trigger

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 26

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 27 Trigger Timing and Control(TTC) f RF = MHz f RF /12  40MHz FEE TDC clock f RF/24  20MHz trigger & FEE pipeline clock

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 28 Global Trigger Logic Inputs: subdetector primitives Time adjustment trigger table Prescaling of some event types System Configuration Trigger data readout

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 29 Summary Pipeline will be used Hardware trigger + software filter Hardware: level 0 + level 1 (L0 is spare signal for FEE) Latency:L ns, L  s Monte Carlo simulation undergoing backgrounds Subsystem trigger scheme Collaboration domestic and international

Zhen'An LIU, Oct BESIII Workshop, IHEP, BEIJING 30 THANK YOU ! WELCOME COLLABORATIONS!