Gates Winkler Jordan Samuel Fei Yin Shen 9 September 2009 Virtual Wallet Design Proposal To create a handheld device which will save money and time through.

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Presentation transcript:

Gates Winkler Jordan Samuel Fei Yin Shen 9 September 2009 Virtual Wallet Design Proposal To create a handheld device which will save money and time through budget assistance.

Overveiw Status Report System Description Market Appeal Functional Design Challenges Transistor Count Road Ahead

Status Report Completed Block Diagrams Finite State Machines To do Verilog Coding Schematic Drawing Layout Testing Simulation

Virtual Wallet System Description A hand-held device which will help a user to stay within a certain budget while shopping User will select a reader from shelf at entrance to store and insert their SecureOne card. After identity confirmation, they will select an account from which to draw money. User may input an amount through keypad or set budget at the amount in their account. 20-bit Integer arithmetic units cumulatively calculate the amount spent, prices will be multiplied and divided by 1000 at appropriate points. The RFID obtained by Virtual Wallet is fed to the online database to obtain information about a product and its price Can get personal coupon/discounts from store database Interfacing logic on the display shows the current total and an item list. Retrieved from the store database with RFID tags. When user is done shopping, the user may check out: SecureOne server will check their account once more. Once payment is received, SecureOne card is returned from device. Clear memories of Virtual Wallet Store security retrieves the device and confirms the user isn’t shoplifting.

Market Appeal Market Space includes any shopping center Allows users to decrease shopping time and not waste money

Functional Design – 1/3 Item SRAM AdderSubtractorComparator Budget FSM USER ID Discount FSM RFID keypad SecureOne card Display SecureOne Database SecureOne Store Database Budget register Input FSM Multiply Divide Checks RFID tag against store database to get price etc. x1000 Make notes in subtractor /1000 Interfacing logic for Database and Display

Functional Design – 2/3 Initial Connect to SecureOne Select Account Input FSM Start Shopping Don’t input budget Set budget to max in account Check account Input Budget Not enough in account Display error Enough in account Budget stored in memory

Functional Design – 2.5/3 Initial Check Database Check SRAM Get nothing Scanned item discount Make note in subtractor No discount Discount FSM Initial Over Remove item Go over Remove item Check SRAM Make note in subtractor Total not over budget Budget FSM Don’t go over Added another item Make note in subtractor Total still over budget Checkout Check SecureOne Database. Pay

Functional Design – 3/3 SRAM: Memory to store bit item RFID tag. Other information looked up from Online store database. Second SRAM stores budget. Adder: Adding block. Will contain a small register to store current value and add to that value as necessary Subtractor: Subtracting block. Will handle discounts and item removals. Includes a small register. As items are removed the SRAM remembers the items removed so they will not be added into total costs Comparator: Takes in the budget entered by the user and after each item is scanned checks to see if one is over the budget Keypad: User Input (not implemented) Display: (not implemented) Interface to Online Database: Data lines

Challenges Haven’t had to face much trouble so far Simply trying to refine our ideas Need to start designing the Virtual Wallet beyond a general block diagram Decide arithmetic circuit types (ripple carry, look ahead, etc.) Unsure about how to design some blocks, such as the size of SRAM, or the design of USER ID Need to start thinking about actual design of functional blocks

Transistor Count SRAMs~5000 Adder~500 Subtractor~500 Multiply~500 Divide~500 Comparator~500 Logic~2000 Registers~500 Total~10,000

Road Ahead Responsibilities: Gates:Verilog, FSMs Yin:SRAM Jordan:Arithmatic Plan to complete work in respect to syllabus schedule Next step: completing functional design and begin chip architecture