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EECS 370 Discussion 1 Sample Exam Questions. EECS 370 Discussion 2 Not Really… xkcd.com.

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Presentation on theme: "EECS 370 Discussion 1 Sample Exam Questions. EECS 370 Discussion 2 Not Really… xkcd.com."— Presentation transcript:

1 EECS 370 Discussion 1 Sample Exam Questions

2 EECS 370 Discussion 2 Not Really… xkcd.com

3 EECS 370 Discussion Topics Today: – Processor Components – Single-Cycle Datapath – Project 2 – Time for Questions 3

4 EECS 370 Discussion 4

5 Processor Components Control Blocks 5

6 EECS 370 Discussion Processor Components - Mux Used to choose options if (select == 0) { OUT = IN1; } else { OUT = IN2; } 6

7 EECS 370 Discussion Processor Components - Decoder Allows an N-bit binary number to select one of 2 N output lines 7 INOUT 00000000001 00100000010 01000000100 01100001000 10000010000 10100100000 11001000000 11110000000

8 EECS 370 Discussion Processor Components – ROM Just a memory! 8 AddressData 0001001 0010100 0100010 0111001 1000010 1010001 1101000 1110000

9 EECS 370 Discussion Processor Components – ROM 9

10 EECS 370 Discussion Processor Components – ROM 10

11 EECS 370 Discussion Processor Components Mathematic Blocks 11

12 EECS 370 Discussion Processor Components – Sign Extension Unit Increases the number of bits in a value Adds 1s or 0s as appropriate 12

13 EECS 370 Discussion Processor Components – Adder OUT = IN1 + IN2; Is this a Half-Adder or Full-Adder? 13

14 EECS 370 Discussion Processor Components – ALU Performs math operations if (f == 0) { OUT = IN1 + IN2; } else { OUT = IN1 ~& IN2; } EQ = (IN1 == IN2); 14

15 EECS 370 Discussion Processor Components State Blocks 15

16 EECS 370 Discussion Processor Components – Registers 16 R_ADDR1 R_ADDR2 W_ADDR W_DATA

17 EECS 370 Discussion Processor Components – Memory 17

18 EECS 370 Discussion Single Cycle Datapath 18

19 EECS 370 Discussion 19

20 EECS 370 Discussion Single Cycle Datapath Key Concept: Entire path executes in a single clock cycle Fetch Instruction Decode Instruction Execute Instruction Memory Access Writeback Data This limits the clock speed to slowest instruction 20

21 EECS 370 Discussion Single Cycle Datapath Example: 5ns Reg Access, 10ns ALU Op, 20ns Mem Access 21 InstI-Mem Access Read Register ALU Operation D-Mem Access Write Register add ✔✔✔✔ nand ✔✔✔✔ lw ✔✔✔✔✔ sw ✔✔✔✔ beq ✔✔✔ jalr ✔✔ noop ✔ halt ✔

22 EECS 370 Discussion Project 2 22

23 EECS 370 Discussion Project 2 Suggested Register Convention HIGHLY recommended you follow this 23 RegisterUse R0Value 0 R1Input N R2Input R R3Return Value R4Local Variable R5Stack Pointer R6Temporary Value R7Return Address

24 EECS 370 Discussion Exam Review Questions 24 ?


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