1. ECE 15B Computer Organization Spring 2011 Dmitri Strukov Partially adapted from Computer Organization and Design, 4 th edition, Patterson and Hennessy,

2. Agenda Recursive function (correction to the last lecture) Wrap-up of HW part (except for floating point) Instruction formats Addressing modes ECE 15B Spring 2011

3. Fibonacci numbers F(n) = F(n-1)+F(n-2) F(1) = 1 F(2) = 1 n = 1 2 3 4 5 6 … F(n) = 1 1 2 3 5 8 … /* Recursive function in c */ int fib(int n) { If (n==1) return 1; If (n==2) return 1; return fib(n-1)+fib(n-2); } ECE 15B Spring 2011

4. Procedures Prolog - spill all register to stack used by procedure expect for $t0-$t9 and the one used for returning values - advance stack pointer ($sp) first then write to stack Body code of the procedure Epilog - restore all used registers - adjust stack pointer at the end ($sp) ECE 15B Spring 2011

5. /* Recursive function in c */ int fib(int n) { If (n==1) return 1; If (n==2) return 1; return fib(n-1)+fib(n-2); } # Recursive function in MIPS assembler #prolog FIB: addi $sp, $sp, -12 sw $a0, 0($sp) sw $s0, 4($sp) sw $ra, 8($ra) # body addi $v0, $zero, 1 addi $t0, $zero, 1 beq $a0, $t0, EPILOG#check for n==1 addi $t0, $zero, 2 beq $a0, $t0, EPILOG#check for n==2 addi $a0, $a0, -1 jal FIB#calculate fib(n-1) addi $s0, $zero, $v0# save fib(n-1) to $s0 addi $a0, $a0, -1 #calculate fib(n-2) jal FIB addi $v0, $v0, $s0 #epilog EPILOG: lw $a0, 0($sp) lw $s0, 4,($sp) lw $ra, 8,($sp) addi $sp, $sp, 12 jr $ra /* Recursive function in c */ int fib(int n) { v0 = 1; If (n==1) goto EXIT; If (n==2) goto EXIT; n = n – 1; s0 = fib(n); n = n – 1; v0 = fib(n); v0 = v0 +s0; EXIT: return v0; }

6. ECE 15B Spring 2011 /* Recursive function in c */ int fib(int n) { If (n==1) return 1; If (n==2) return 1; return fib(n-1)+fib(n-2); } # Recursive function in MIPS assembler #prolog FIB: addi $sp, $sp, -12 sw $a0, 0($sp) sw $s0, 4($sp) sw $ra, 8($ra) # body addi $v0, $zero, 1 addi $t0, $zero, 1 beq $a0, $t0, EPILOG#check for n==1 addi $t0, $zero, 2 beq $a0, $t0, EPILOG#check for n==2 addi $a0, $a0, -1 jal FIB#calculate fib(n-1) addi $s0, $zero, $v0# save fib(n-1) to $s0 addi $a0, $a0, -1 #calculate fib(n-2) jal FIB addi $v0, $v0, $s0 #epilog EPILOG: lw $a0, 0($sp) lw $s0, 4,($sp) lw $ra, 8,($sp) addi $sp, $sp, 12 jr $ra /* Recursive function in c */ int fib(int n) { v0 = 1; If (n==1) goto EXIT; If (n==2) goto EXIT; n = n – 1; s0 = fib(n); n = n – 1; v0 = fib(n); v0 = v0 +s0; EXIT: return v0; }

7. Now let’s see changes in the memory (stack) and register file as we execute recursive function with n = 3 First let’s review datapath and where code is stored ECE 15B Spring 2011

8. Simple datapath review ECE 15B Spring 2011

9. Simple datapath review ECE 15B Spring 2011 stack instructions

10. Where is the code stored? ECE 15B Spring 2011 stack Code (????) static data dynamic data (heap) RF[$sp] 0 ANS: In main memory

11. Instruction memory ECE 15B Spring 2011 stack code static data dynamic data (heap) IM: Physically different memory Logically mapped to main memory

12. Direct mapped cache implementation of instruction memory ECE 15B Spring 2011 Main Main memory Instruction memory At any point in time IM has a copy of a portion of main memory Separate memory (tag) to store which location is currently mapped 0 16 24 Tag (28 bit) If upper portion of PC (28 bit) matches tag then IM has right values (hit), otherwise stop execution and load right portion

13. Recursive function execution: step by step ECE 15B Spring 2011 0x0100addi $a0, $zero, 3 0x0104 jal FIB 0x0108 next instruction XXXXXXXXXXXXXXXXXXXXXX FIB: 0x1000addi $sp, $sp, -12 0x1004sw $a0, 0($sp) 0x1008sw $s0, 4($sp) 0x100Csw $ra, 8($ra) 0x1010addi $v0, $zero, 1 0x1014addi $t0, $zero, 1 0x1018beq $a0, $t0, EPILOG 0x101Caddi $t0, $zero, 2 0x1020beq $a0, $t0, EPILOG 0x1024addi $a0, $a0, -1 0x1028jal FIB 0x102Caddi $s0, $zero, $v0 0x1030addi $a0, $a0, -1 0x1034 jal FIB 0x1038addi $v0, $v0, $s0 EPILOG: 0x103Clw $a0, 0($sp) 0x1040lw $s0, 4,($sp) 0x1044lw $ra, 8,($sp) 0x1048addi $sp, $sp, 12 0x104Cjr $ra indexvalue $v00 $a03 $t00 $s00 $sp0xFFFF0000 $ra0x0108 indexvalue 0xFFFF00000x00000000 0xFFFF00FC 0xFFFF00F8 0xFFFF00F4 RF (right after execution of initial jal FIB at 0x0104) MM (initial values in stack)

14. Recursive function execution: step by step ECE 15B Spring 2011 0x0100addi $a0, $zero, 3 0x0104 jal FIB 0x0108 next instruction XXXXXXXXXXXXXXXXXXXXXX FIB: 0x1000addi $sp, $sp, -12 0x1004sw $a0, 0($sp) 0x1008sw $s0, 4($sp) 0x100Csw $ra, 8($ra) 0x1010addi $v0, $zero, 1 0x1014addi $t0, $zero, 1 0x1018beq $a0, $t0, EPILOG 0x101Caddi $t0, $zero, 2 0x1020beq $a0, $t0, EPILOG 0x1024addi $a0, $a0, -1 0x1028jal FIB 0x102Caddi $s0, $zero, $v0 0x1030addi $a0, $a0, -1 0x1034 jal FIB 0x1038addi $v0, $v0, $s0 EPILOG: 0x103Clw $a0, 0($sp) 0x1040lw $s0, 4,($sp) 0x1044lw $ra, 8,($sp) 0x1048addi $sp, $sp, 12 0x104Cjr $ra indexvalue $v01 $a02 $t02 $s00 $sp0xFFFF00F4 $ra0x102C indexvalue 0xFFFF01000x00000000 0xFFFF00FC0x0108 0xFFFF00F80 0xFFFF00F43 RF (after execution jal FIB at 0x1028) MM - stack

15. Recursive function execution: step by step ECE 15B Spring 2011 0x0100addi $a0, $zero, 3 0x0104 jal FIB 0x0108 next instruction XXXXXXXXXXXXXXXXXXXXXX FIB: 0x1000addi $sp, $sp, -12 0x1004sw $a0, 0($sp) 0x1008sw $s0, 4($sp) 0x100Csw $ra, 8($ra) 0x1010addi $v0, $zero, 1 0x1014addi $t0, $zero, 1 0x1018beq $a0, $t0, EPILOG 0x101Caddi $t0, $zero, 2 0x1020beq $a0, $t0, EPILOG 0x1024addi $a0, $a0, -1 0x1028jal FIB 0x102Caddi $s0, $zero, $v0 0x1030addi $a0, $a0, -1 0x1034 jal FIB 0x1038addi $v0, $v0, $s0 EPILOG: 0x103Clw $a0, 0($sp) 0x1040lw $s0, 4,($sp) 0x1044lw $ra, 8,($sp) 0x1048addi $sp, $sp, 12 0x104Cjr $ra indexvalue $v01 $a02 $t02 $s00 $sp0xFFFF00E8 $ra0x102C indexvalue 0xFFFF01000x00000000 0xFFFF00FC0x0108 0xFFFF00F80 0xFFFF00F43 0xFFFF00F00x102C 0xFFFF00EC0 0xFFFF00E82 RF (after execution beq at 0x1020) MM - stack

16. Recursive function execution: step by step ECE 15B Spring 2011 0x0100addi $a0, $zero, 3 0x0104 jal FIB 0x0108 next instruction XXXXXXXXXXXXXXXXXXXXXX FIB: 0x1000addi $sp, $sp, -12 0x1004sw $a0, 0($sp) 0x1008sw $s0, 4($sp) 0x100Csw $ra, 8($ra) 0x1010addi $v0, $zero, 1 0x1014addi $t0, $zero, 1 0x1018beq $a0, $t0, EPILOG 0x101Caddi $t0, $zero, 2 0x1020beq $a0, $t0, EPILOG 0x1024addi $a0, $a0, -1 0x1028jal FIB 0x102Caddi $s0, $zero, $v0 0x1030addi $a0, $a0, -1 0x1034 jal FIB 0x1038addi $v0, $v0, $s0 EPILOG: 0x103Clw $a0, 0($sp) 0x1040lw $s0, 4,($sp) 0x1044lw $ra, 8,($sp) 0x1048addi $sp, $sp, 12 0x104Cjr $ra indexvalue $v01 $a02 $t02 $s00 $sp0xFFFF00F4 $ra0x102C indexvalue 0xFFFF01000x00000000 0xFFFF00FC0x0108 0xFFFF00F80 0xFFFF00F43 0xFFFF00F00x102C 0xFFFF00EC0 0xFFFF00E82 RF (after execution jr at 0x104C) MM - stack

17. Recursive function execution: step by step ECE 15B Spring 2011 0x0100addi $a0, $zero, 3 0x0104 jal FIB 0x0108 next instruction XXXXXXXXXXXXXXXXXXXXXX FIB: 0x1000addi $sp, $sp, -12 0x1004sw $a0, 0($sp) 0x1008sw $s0, 4($sp) 0x100Csw $ra, 8($ra) 0x1010addi $v0, $zero, 1 0x1014addi $t0, $zero, 1 0x1018beq $a0, $t0, EPILOG 0x101Caddi $t0, $zero, 2 0x1020beq $a0, $t0, EPILOG 0x1024addi $a0, $a0, -1 0x1028jal FIB 0x102Caddi $s0, $zero, $v0 0x1030addi $a0, $a0, -1 0x1034 jal FIB 0x1038addi $v0, $v0, $s0 EPILOG: 0x103Clw $a0, 0($sp) 0x1040lw $s0, 4,($sp) 0x1044lw $ra, 8,($sp) 0x1048addi $sp, $sp, 12 0x104Cjr $ra indexvalue $v01 $a01 $t02 $s01 $sp0xFFFF00F4 $ra0x1038 indexvalue 0xFFFF01000x00000000 0xFFFF00FC0x0108 0xFFFF00F80 0xFFFF00F43 0xFFFF00F00x102C 0xFFFF00EC0 0xFFFF00E82 RF (after execution jal at 0x1034) MM - stack

18. Recursive function execution: step by step ECE 15B Spring 2011 0x0100addi $a0, $zero, 3 0x0104 jal FIB 0x0108 next instruction XXXXXXXXXXXXXXXXXXXXXX FIB: 0x1000addi $sp, $sp, -12 0x1004sw $a0, 0($sp) 0x1008sw $s0, 4($sp) 0x100Csw $ra, 8($ra) 0x1010addi $v0, $zero, 1 0x1014addi $t0, $zero, 1 0x1018beq $a0, $t0, EPILOG 0x101Caddi $t0, $zero, 2 0x1020beq $a0, $t0, EPILOG 0x1024addi $a0, $a0, -1 0x1028jal FIB 0x102Caddi $s0, $zero, $v0 0x1030addi $a0, $a0, -1 0x1034 jal FIB 0x1038addi $v0, $v0, $s0 EPILOG: 0x103Clw $a0, 0($sp) 0x1040lw $s0, 4,($sp) 0x1044lw $ra, 8,($sp) 0x1048addi $sp, $sp, 12 0x104Cjr $ra indexvalue $v01 $a01 $t01 $s01 $sp0xFFFF00E8 $ra0x1038 indexvalue 0xFFFF01000x00000000 0xFFFF00FC0x0108 0xFFFF00F80 0xFFFF00F43 0xFFFF00F00x1038 0xFFFF00EC1 0xFFFF00E81 RF (after execution beq at 0x1018) MM - stack

19. Recursive function execution: step by step ECE 15B Spring 2011 0x0100addi $a0, $zero, 3 0x0104 jal FIB 0x0108 next instruction XXXXXXXXXXXXXXXXXXXXXX FIB: 0x1000addi $sp, $sp, -12 0x1004sw $a0, 0($sp) 0x1008sw $s0, 4($sp) 0x100Csw $ra, 8($ra) 0x1010addi $v0, $zero, 1 0x1014addi $t0, $zero, 1 0x1018beq $a0, $t0, EPILOG 0x101Caddi $t0, $zero, 2 0x1020beq $a0, $t0, EPILOG 0x1024addi $a0, $a0, -1 0x1028jal FIB 0x102Caddi $s0, $zero, $v0 0x1030addi $a0, $a0, -1 0x1034 jal FIB 0x1038addi $v0, $v0, $s0 EPILOG: 0x103Clw $a0, 0($sp) 0x1040lw $s0, 4,($sp) 0x1044lw $ra, 8,($sp) 0x1048addi $sp, $sp, 12 0x104Cjr $ra indexvalue $v01 $a01 $t01 $s01 $sp0xFFFF00F4 $ra0x1038 indexvalue 0xFFFF01000x00000000 0xFFFF00FC0x0108 0xFFFF00F80 0xFFFF00F43 0xFFFF00F00x1038 0xFFFF00EC1 0xFFFF00E81 RF (after execution jr at 0x104C) MM - stack

20. Recursive function execution: step by step ECE 15B Spring 2011 0x0100addi $a0, $zero, 3 0x0104 jal FIB 0x0108 next instruction XXXXXXXXXXXXXXXXXXXXXX FIB: 0x1000addi $sp, $sp, -12 0x1004sw $a0, 0($sp) 0x1008sw $s0, 4($sp) 0x100Csw $ra, 8($ra) 0x1010addi $v0, $zero, 1 0x1014addi $t0, $zero, 1 0x1018beq $a0, $t0, EPILOG 0x101Caddi $t0, $zero, 2 0x1020beq $a0, $t0, EPILOG 0x1024addi $a0, $a0, -1 0x1028jal FIB 0x102Caddi $s0, $zero, $v0 0x1030addi $a0, $a0, -1 0x1034 jal FIB 0x1038addi $v0, $v0, $s0 EPILOG: 0x103Clw $a0, 0($sp) 0x1040lw $s0, 4,($sp) 0x1044lw $ra, 8,($sp) 0x1048addi $sp, $sp, 12 0x104Cjr $ra indexvalue $v02 $a03 $t01 $s00 $sp0xFFFF00F4 $ra0x0108 indexvalue 0xFFFF01000x00000000 0xFFFF00FC0x0108 0xFFFF00F80 0xFFFF00F43 0xFFFF00F00x1038 0xFFFF00EC1 0xFFFF00E81 RF (after execution jr at 0x104C) MM - stack

21. Recursive function execution: step by step ECE 15B Spring 2011 0x0100addi $a0, $zero, 3 0x0104 jal FIB 0x0108 next instruction XXXXXXXXXXXXXXXXXXXXXX FIB: 0x1000addi $sp, $sp, -12 0x1004sw $a0, 0($sp) 0x1008sw $s0, 4($sp) 0x100Csw $ra, 8($ra) 0x1010addi $v0, $zero, 1 0x1014addi $t0, $zero, 1 0x1018beq $a0, $t0, EPILOG 0x101Caddi $t0, $zero, 2 0x1020beq $a0, $t0, EPILOG 0x1024addi $a0, $a0, -1 0x1028jal FIB 0x102Caddi $s0, $zero, $v0 0x1030addi $a0, $a0, -1 0x1034 jal FIB 0x1038addi $v0, $v0, $s0 EPILOG: 0x103Clw $a0, 0($sp) 0x1040lw $s0, 4,($sp) 0x1044lw $ra, 8,($sp) 0x1048addi $sp, $sp, 12 0x104Cjr $ra indexvalue $v0 2 $a03 $t01 $s00 $sp0xFFFF00F4 $ra0x0108 indexvalue 0xFFFF01000x00000000 0xFFFF00FC0x0108 0xFFFF00F80 0xFFFF00F43 0xFFFF00F00x1038 0xFFFF00EC1 0xFFFF00E81 RF (at the end of program) MM - stack

22. Is code optimal? * No need to spill registers when n = 1 and n = 2 * F(n-2) is calculated independently of F(n-1). Better version could be (which is linear in time with n): int fib(int a, int b, int n) { if (n==2) return a; else return fib(a+b, a, n‐1); } …. and use fib(1,1,n) * Even better to use for-loop or do-while ? ECE 15B Spring 2011

23. Instruction formats ECE 15B Spring 2011

24. Instruction formats ECE 15B Spring 2011 oprsrtrdshamtfunct 6 bits 5 bits R-format: oprsrtconstant or address 6 bits5 bits 16 bits opaddress 6 bits 26 bits I-format: J-format:

25. Instruction formats ECE 15B Spring 2011 Why stick to fixed formats? rigid and just few formats + fixed instruction size  simple decoding  faster clock cycle (  hopefully faster execution) note that it is always a tradeoff: too rigid and simple instruction set could be result in the large number of instructions several visual example later…

26. R-format Example add $t0, $s1, $s2 special$s1$s2$t00add 017188032 00000010001100100100000000100000 00000010001100100100000000100000 2 = 02324020 16 oprsrtrdshamtfunct 6 bits 5 bits note the order! (green card) ECE 15B Spring 2011

27. Basic addressing modes Very important aspect of ISA identifying how operands are defined for each operation Typically one (or two) operands is (are) register(s), i.e. general purpose one or PC, while another one is either Immediate Register Memory (may use imm but the actual operand is memory) This how you define basic immediate, register or memory classes of addressing modes ECE 15B Spring 2011

28. Specific Addressing Mode in MIPS ECE 15B Spring 2011

29. MIPS PC-relative or branch addressing Branch instructions specify – Opcode, two registers, target address Most branch targets are near branch – Forward or backward oprsrtconstant or address 6 bits5 bits 16 bits PC-relative addressing Target address = PC + offset × 4 PC already incremented by 4 by this time ECE 15B Spring 2011

30. Pseudodirect or Jump Addressing Jump ( j and jal ) targets could be anywhere in text segment – Encode full address in instruction opaddress 6 bits 26 bits (Pseudo)Direct jump addressing Target address = PC 31…28 : (address × 4) ECE 15B Spring 2011

31. Target Addressing Example Loop code from earlier example – Assume Loop at location 80000 Loop: sll $t1, $s3, 2 800000019940 add $t1, $t1, $s6 8000409229032 lw $t0, 0($t1) 8000835980 bne $t0, $s5, Exit 8001258212 addi $s3, $s3, 1 80016819 1 j Loop 80020220000 Exit: … 80024 ECE 15B Spring 2011

32. Note on the PC incrementing Technical term for auto-incrementation of PC is “delayed branch” By default in SPIM “delayed branch” is not checked. To see you SPIM settings look at simulator  settings You can also check it by loading code to SPIM to check main : bne $s0, $s0, main ECE 15B Spring 2011

33. Branching Far Away If branch target is too far to encode with 16- bit offset, assembler rewrites the code Example beq $s0,$s1, L1 ↓ bne $s0,$s1, L2 j L1 L2:… ECE 15B Spring 2011

34. Various specific addressing modes in other ISAs Absolute address Immediate data Inherent address Register direct Register indirect Base register Register indirect with index register Register indirect with index register and displacement Register indirect with index register scaled Absolute address with index register Memory indirect Program counter relative ECE 15B Spring 2011

35. Example: Basic x86 Addressing Modes Two operands per instruction Source/dest operandSecond source operand Register Immediate RegisterMemory Register MemoryImmediate Memory addressing modes Address in register Address = R base + displacement Address = R base + 2 scale × R index (scale = 0, 1, 2, or 3) Address = R base + 2 scale × R index + displacement ECE 15B Spring 2011

36. Example of decoding and addressing modes in datapath ECE 15B Spring 2011

37. Simple datapath picture Let’s add more details on this figure to see why instruction decoding could be simple and to see what is happening with for different instructions ECE 15B Spring 2011

38. Datapath With Control ECE 15B Spring 2011

39. R-Type Instruction ECE 15B Spring 2011

40. Load Instruction ECE 15B Spring 2011

41. Branch-on-Equal Instruction ECE 15B Spring 2011

42. Implementing Jumps Jump uses word address Update PC with concatenation of – Top 4 bits of old PC – 26-bit jump address – 00 Need an extra control signal decoded from opcode 2address 31:2625:0 Jump ECE 15B Spring 2011

43. Datapath With Jumps Added ECE 15B Spring 2011

44. Advanced Topics: Code density examples ECE 15B Spring 2011

45. Recent study (2009) ECE 15B Spring 2011

46. Code density examples ECE 15B Spring 2011