1. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.1. Single-bus organization of the datapath inside a processor.

2. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.2. Input and output gating for the registers in Figure 7.1.

3. Figure 7.3. Input and output gating for one register bit.

4. Figure 7.4. Connection and control signals for register MDR.

5. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.5. Timing of a memory READ operation.

7. StepAction 1PC out,MAR in,Read,Select4,Add,Z in 2Z out,PC in,Y,WMFC 3MDR out,IR in 4Offset-field-of-IR out,Add,Z in 5Z out,PC in,End Figure 7.7. Control sequence for an unconditional branch instruction.

8. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.8. Three-bus organization of the datapath.

9. StepAction 1PC out,R=B,MAR in,Read,IncPC 2WMFC 3MDR outB,R=B,IR in 4R4 outA,R5 outB,SelectA,Add,R6 in,End Figure 7.9.Control sequence for the instruction. Add R4,R5,R6, for the three-bus organization in Figure 7.8.

10. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.10. Control unit organization.

12. Figure 7.12. Generation of the Z i n control signal for the processor in Figure 7.1. T 1 Add Branch T 4 T 6

14. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.14. Block diagram of a complete processor.

17. AddressMicroinstruction 0PC out,MAR in,Read,Select4,Add,Z in 1Z out,PC in,Y,WMFC 2MDR out,IR in 3Branchtostartingaddressofappropriatemicroroutine.................................................................. 25IfN=0,thenbranchtomicroinstruction0 26Offset-field-of-IR out,SelectY,Add,Z in 27Z out,PC in,End Figure 7.17. Microroutine for the instruction Branch<0.

18. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.18.Organization of the control unit to allow conditional branching in the microprogram.

19. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.19. An example of a partial format for field-encoded microinstructions.

20. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.20. Flowchart of a microprogrm for the Add src,Rdst instruction.

21. OP code010RsrcRdst Mode Contents of IR 034781011 Figure 7.21.Microinstruction for Add (Rsrc)+,Rdst. Note: Microinstruction at location 170 is not executed for this addressing mode. AddressMicroinstruction (octal) 000PC out, MAR in, Read, Select 4, Add, Z in 001Z out, PC in, Y in, WMFC 002MDR out, IR in 003  Branch {  PC  101 (from Instruction decoder);  PC 5,4  [IR 10,9 ];  PC 3  121Rsrc out, MAR in, Read, Select4, Add, Z in 122Z out, Rsrc in 123 170MDR out, MAR in, Read, WMFC 171MDR out, Y in 172Rdst out, SelectY, Add, Z in 173Z out, Rdst in, End [IR 10 ]  [IR 9 ]  8 ]}  Branch {  PC  170;  PC 0  [IR 8 ]}, WMFC

22. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.22. Microinstruction-sequencing organization.

23. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.23. Format for microinstructions in the example of Section 7.5.3.

25. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.25. Some details of the control-signal-generating circuitry.

26. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure 7.26.Control circuitry for the bit-ORing. (Part of the decoding circuit in Figure 7.25.)

27. Figure P7.1. Organization of shift-register control for Problem 7.22.

28. Clock A B X Y Z Figure P7.2. Digital controller in Problem 7.23.

29. Please see “portrait orientation” PowerPoint file for Chapter 7 Figure P7.3. A microinstruction-sequence pattern used in Problem 7.30.