1. WEEK #11 FUNCTIONS OF COMBINATIONAL LOGIC (PART 4)
DKT 122/3 DIGITAL SYSTEM 1
WEEK #11
FUNCTIONS OF COMBINATIONAL LOGIC (PART 4)

2. Topic Outlines
Code Converters
Comparators
Parity Generators/Checkers

3. Code Converters
Code converters is a device that is used to convert a coded number into another form that is more usable by a computer or digital system
Example: BCD to binary, BCD to 7-segment display, Gray-to-binary code and binary-to-Gray code

4. Code Converters BCD-to-Binary Conversion
The basic conversion process is as follows:
(a) The value, or weight of each bit in the BCD number is represented by a binary number
(b) All of the binary representations of the weights of bits that are 1’s in the BCD number are added
(c) The result of this addition is the binary equivalent of the BCD number

5. Code Converters BCD-to-Binary Conversion Example: 1000 0111 : BCD
: decimal
weight
Within each group, the binary weight of each bit is as follows:
Tens Digit Units Digit
Weight:
Bit designation: B3 B2 B1 B A3 A2 A1 A0

6. BINARY REPRESENTATION
Code Converters
BCD-to-Binary Conversion
BCD BIT
BCD WEIGHT
BINARY REPRESENTATION
(MSB) (LSB) 64 32 16 8 4 2 1 A0 A1 A2 A3 B0 10 B1 20 B2 40 B3 80
If the binary representations for the weights of all the 1’s in the BCD number are added, the results is the binary number that corresponds to the BCD number.

7. Code Converters Binary-to-Gray Conversion (and vice-versa)
4-bit binary-to-Gray conversion logic
4-bit Gray-to-binary conversion logic

8. Comparators
To compare two digital quantities to determine the relationship of those quantities
Comparison is made in terms of
Equal to (“=”)
Less than (“<”)
Greater than (“>”)

9. Equality comparison of two 2-bit numbers
Comparators
Equality
Truth-Table A B
A=B 1
The output of the AND gate indicates equality (1) or inequality (0)
Logic diagram
Equality comparison of two 2-bit numbers

10. Logic symbol for a 4-bit comparator with inequality function
Comparators
Inequality
(“<” or “>”)
To determine the inequality of binary numbers A and B, first examine the highest order bit for each number:
If A3=1 and B3=0,
means number A > B
If A3=0 and B3=1,
means number A < B
If A3=B3,
need to examine the next lower bit position for an inequality
Logic symbol for a 4-bit comparator with inequality function

11. Comparators
7485 comparator chip

12. Comparators
8-bit magnitude comparator

13. Parity Generators/Checkers
Error detection
A parity bit is a scheme for detecting errors during transmission of binary info.
The message, including the parity bit, is transmitted and then checked at the receiving end for errors.
An error is detected if the checked parity does not correspond to the one transmitted.
The circuit that generates the parity bit in the transmitter is a parity generator.
The circuit that checks the parity bit in the receiver is a parity checker.

14. Parity Generators/Checkers
Error detection
Parity systems are defined as either odd parity or even parity.
The parity system adds an extra bit to the digital information being transmitted.
E.g.: 4-bit system requires a 5-th bit,
8-bit system will require a 9-th bit, …
The parity bit will be a 1 or 0, depending on what the other bits are.
E.g. (4-bit system)
Odd-parity system - the parity bit that is added must make the sum of all 5 bits odd
Even-parity system - the parity bit makes the sum of all 5 bits even

15. Odd Parity
In ODD parity when we add the bits together disregarding weight we get or want to get an odd number.
is a four bit message
add a parity bit to make it odd
Odd parity is satisfied
is an eight bit message
Odd parity is satisfied
Parity bit

16. Even Parity
In EVEN parity when we add the bits together disregarding weight we get or want to get an even number.
is a four bit message
add a parity bit to make it even
Even parity is satisfied
is an eight bit message
Even parity is satisfied
Parity bit

17. Parity Generator Parity Generator Use exclusive ORs and Exclusive NORs
Even Parity
Odd Parity

18. Parity Generator Parity generator truth table
For odd parity, the bit P is generated so as to make the number of 1’s odd (including P) X Y Z P 1
3-bit odd parity generator
Question: How about EVEN parity generator?

19. Parity Checker
Parity Checker
0 – ok
1 – error
Odd Parity
Even Parity

20. Parity Checker
X Y Z P C
The three-bit message (X, Y, Z) and parity bit (P) are transmitted to their destination, where they are applied to a ODD parity checker circuit.
An error occurs during transmission if the parity of the four bits is even, since the binary info transmitted was originally odd.
The output C of the parity checker should be a 1 when an error occurs, i.e. when the number of 1’s in the four inputs is even.

21. Parity Generators/Checkers
The 9-bit parity generator/checker
Input is 8-bits of data and 1 parity bit
When there is an even no. of 1’s at the inputs, the Σ Even is high while the Σ Odd is low.

22. Parity Generators/Checkers
The 9-bit parity generator/checker
Parity Checker Function
When used as an EVEN Parity Checker,
If a parity error occurs, the Σ Even is low while the Σ Odd is high.
When used as an ODD Parity Checker,
If a parity error occurs, the Σ Odd is low while the Σ Even is high.

23. Parity Generators/Checkers
The 9-bit parity generator/checker
Parity Generator Function
When used as an EVEN Parity Generator,
The parity bit is taken at the Σ Odd output.
It is 0 if there is an even no. of 1’s, and is 1 if there is an odd no.
When used as an ODD Parity Generator,
The parity bit is taken at the Σ Even output.
It is 0 if there is an odd no. of 1’s, and is 1 if there is an even no.
END