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Progress on DC/DC Converters Prototypes B.Allongue 1, G.Blanchot 1, F.Faccio 1, C.Fuentes 1,3, S.Michelis 1,2, S.Orlandi 1, 1 CERN – PH-ESE 2 EPFL, Lausanne.

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Presentation on theme: "Progress on DC/DC Converters Prototypes B.Allongue 1, G.Blanchot 1, F.Faccio 1, C.Fuentes 1,3, S.Michelis 1,2, S.Orlandi 1, 1 CERN – PH-ESE 2 EPFL, Lausanne."— Presentation transcript:

1 Progress on DC/DC Converters Prototypes B.Allongue 1, G.Blanchot 1, F.Faccio 1, C.Fuentes 1,3, S.Michelis 1,2, S.Orlandi 1, 1 CERN – PH-ESE 2 EPFL, Lausanne 3 UTFSM, Valparaiso, Chile

2 Outline  Summary of conductive noise properties of different converters CERN developed prototypes Other prototypes Modeling of the common mode noise  Study of the inductor emitted noise Different geometries Comparison between shielded and unshielded inductors Efficiency versus ESR  Plans for the future TWEPP 2008, Naxos S. Michelis, CERN PH/ESE 2

3 ESE Seminar, Sept08 F.Faccio, PH/ESE 3 Conducted noise measurement  Reference test bench developed within ESE Well defined measurement methods for reproducible and comparable results. Independence from the system and from the bulk power source. Arrangement of cables, input and output filter (LISN) around the converter under test, all above a ground plane.

4 Noise measurement on different CERN prototypes TWEPP 2008, Naxos S. Michelis, CERN PH/ESE 4 Proto2 Proto3 Proto4 All the measurement were made in these conditions: Vin=10V, Vout=2.5V, Iout=1A and f sw =1Mhz Proto 1,2,3 were developed at CERN with the same controller. PCB layout and parasitic component choice was improved Proto 4’s PCB was designed in Aachen and the ASIC (in the red spot) was designed at CERN ~46dBµA ~51dBµA ~58dBµA ~62dBµA Proto1

5 Noise measurement on other converters TWEPP 2008, Naxos S. Michelis, CERN PH/ESE 5 ST proto ST Empirion Measurement made in Aachen, Acknowledgments to R. Jussen ENPIRION PCB was developed in RWTH in Aachen Proto3 CERN ~32dBµA ~64dBµA ~46dBµA f sw =4Mhzf sw =1Mhz Proto3 CERN Vin=10V, Vout=2.5V, Iout=1A and f sw =1Mhz Vin=6.5V, Vout=2.5V, Iout=0.542A

6 Switched capacitor TWEPP 2008, Naxos S. Michelis, CERN PH/ESE 6 LBL switched capacitor Vin=5V, Vout=1.25V, Iout=0.5A and f sw =0.5Mhz ~55dB

7 Modeling common mode noise  A model for a prototype (version 3) has been developed and simulated with PSPICE All stray capacitances due to the board layout have been extracted with Q3D Switching transistors replaced by voltage source (from measured Vds) and equivalent passives (R,C) All discrete passive components have been fully characterized (ESR, ESL)  Good agreement between model and experiment (up to 10MHz)  Large influence of input-output capacitors – value and ESR, ESL! TWEPP 2008, Naxos S. Michelis, CERN PH/ESE 7 Input common mode current vs freq and ESL Input common mode current vs freq and Cout Input common mode current vs freq and ESR

8 Noise influence of input output capacitor TWEPP 2008, Naxos S. Michelis, CERN PH/ESE 8 All the measurement were made in these conditions: Vin=10V, Vout=2.5V, Iout=1A and f sw =1Mhz on Proto3 Case 1 (ceramic Cin=42μF and Cout=21μF)Case 2 (ceramic Cin=100μF and Cout=100μF) Case 3 (electrolytic Cin=22μF and Cout=22μF) Case 4 (electrolytic Cin=5x22μF and Cout=5x22μF) Proto3

9 Outline  Summary of conductive noise properties of different converters CERN developed prototypes Other prototypes Modeling of the common mode noise  Study of the inductor emitted noise Different geometries Comparison between shielded and unshielded inductors Efficiency versus ESR  Plans for the future TWEPP 2008, Naxos S. Michelis, CERN PH/ESE 9

10 ESE Seminar, Sept08 F.Faccio, PH/ESE 10 Which inductor to use?  Air-core inductors can be manufactured in different configurations (planar, solenoidal, thoroidal, ….) and a choice should be made  Value: reasonably limited in range 100-700nH  Equivalent resistance (ESR) determines converter efficiency to sensible extent Planar (on PCB) ESR>100m  Solenoidal ESR~20-30m  Toroidal ESR~20-30m  Need to make 3D simulation to find the best suitable geometry for emitted magnetic field and ESR  Simulation of different geometry inductors with and without shield @1Mhz  Current=1A

11 Air core solenoid Value @ 11mm far from the solenoid: 5µT18nT Not shielded Shielded

12 Air core toroid 11mm far from the centre of the toroid Value @ 11mm far from the toroid: 6.6µT

13 Example PCB Toroid Value @ 11mm far from the toroid: 19µT70nT Not shielded Shielded This PCB toroid was developed at Bristol, Aknowledegment to David Cussans

14 Comparison between inductors INDUCTOR TYPE INDUCTAN CE ESR MAIN HOLE DIAMETER MAGNETIC FIELD AT 11mm Not shieldedshielded SOLENOID (10 turns) 260 nH31 mΩ4 mm5.6 µT18nT SOLENOID (27 turns) 827 nH54 mΩ4 mm17 µT- AIR CORE TOROID 550 nH70mΩ4 mm6.6 µT- PCB TOROID “Bristol” 251 nH 200mΩ* (*standard PCB, can be ~100 mΩ) 11 mm17.2 µT70nT  This is a preliminary study, but it seems that air core shielded solenoid is the best option for the emission of magnetic field. Test needs to be made to confirm these simulations!  Toroid emits much more than expected. Magnetic field is not all contained!

15 Efficiency versus ESR TWEPP 2008, Naxos S. Michelis, CERN PH/ESE 15 The choice of the inductor must be also dictated by the ESR Calculations on Mathacd show a dramatic drop of converter’s efficiency with the increase of ESR (both considering or neglecting skin effect)

16 Outline  Summary of conductive noise properties of different converters CERN developed prototypes Other prototypes Modeling of the common mode noise  Study of the inductor emitted noise Different geometries Comparison between shielded and unshielded inductors Efficiency versus ESR  Plans for the future TWEPP 2008, Naxos S. Michelis, CERN PH/ESE 16

17 Plans for the future  Prototype phase will continue towards the development of a 2-phase interleaved with voltage divider: with discrete parts fully integrated ASIC (except passive components)  Radiation tolerance studies on different technologies  Further studies on noise coupling will be carried out. Exploring noise couplings into FE chips and shielding techniques Modeling other noise sources: dI/dt (switching level) dv/dt (gate voltage-bootstrap) Choosing the inductor technology that is most suitable for sLHC


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