1. 14/6/2000 End Cap Muon Trigger Review at CERN 1 TGC LVL1 Trigger System Link C.Fukunaga/Tokyo Metropolitan University TGC electronics group System link Data transfer for EC muon LVL1 trigger processing is important because system is sliced to four parts in two areas On detector In USA15 cavern Data Link for DAQ between SB and Star Switch Hi-pT Board (High pT ID) Sector Logic Slave Board (Low pT ID) Patch Panel (Bunch X ID) PS pack On detector USA15 ~15m~90m

2. 14/6/2000 End Cap Muon Trigger Review at CERN 2 Trigger Data Flow 9 bit 20 bit LVDS (15m) G-Link(90m) Optical fibre

3. 14/6/2000 End Cap Muon Trigger Review at CERN 3 Long Distance LVDS link For Trigger data of ~10 bit data transfer between SB and Hi-pT, we plan to use differential LVDS signal protocol. –Length ~ 15m –Bandwidth ~10bit * 40MHz =50MByte/s –10 bit data are serialized at the output of an SB and deserialized at Hi-pT input Problems foreseen: –Serializer/deserializer chips –Long distance transfer –Magnetic field Experience of LVL1 Cal. Group is very helpful for us

4. 14/6/2000 End Cap Muon Trigger Review at CERN 4 Issues for LVDS 10 bit Serializer/Deserializer from National Semiconductor Co. DS92LV1021/1210 (16-40 MHz) will be ideal one for our purpose as LAr Group does. –They pointed out, however, the chipset has not been easy to use; careful board layout is needed, it must be well separated from the power-supply lines to protect noise pick up. There is an evaluation board recently released for this chipset from the company. –With this board, we check the chipset with long distance signal xfer. New 10 bit Serializer/Deserializer DS92LV1025/1224 chipset but works for 40-66 MHz is also released –Since the pin allocation and size are the same as present ones, we can check this with the same test setup.

5. 14/6/2000 End Cap Muon Trigger Review at CERN 5 Issues for LVDS (cont.) Long distance driving of LVDS (~15m) LAr group has envisaged high frequency losses of cable over long distance. Losses cause jitter at Receiver side (> 100ps). For reduction this value, we may need some compensation circuits. Magnetic Field 500-1KGauss field is foreseen, it will make problems owing to –Small driving currents of LVDS –Nature of differential signal transfer (two reciprocal currents in a pair)

6. 14/6/2000 End Cap Muon Trigger Review at CERN 6 G-Link for Hi-pT and Sector Logic G-Link (Gigabit Rate Transmission Protocol) is developed by Hewlett-Packard. Serializer/deserializer with transceiver/receiver chipset HDMP-1022/1024 by HP is useful for data transfer from a Hi-pT board to Sector Logic in USA15 –Length ~90 m –Bandwidth: 20 bit*40 MHz ~ 0.8 Gbyte/s (Gbit Ethernet)

7. 14/6/2000 End Cap Muon Trigger Review at CERN 7 G-Link Structure HP HDMP-1022 HP HDMP-1022 HP HDMP-1024 HP HDMP-1024 VCSEL (LASER EMITTER) Optical Fibre

8. 14/6/2000 End Cap Muon Trigger Review at CERN 8 Issues VCSEL & Optical fibre –VCSEL (Vertical Cavity Surface Emitting Laser) High Band Width (1-10Gb/s) Surface emitter – good connectivity with optical fibre –Low divergence, circular beam profile from VCSEL is appropriate for multimode fibre High output power/Low power consumption Yet a few products for 850nm light emission (short wave) –Optical fibre Recent development of GB/10GB Ethernet makes easier to select appropriate multimode fibres –for IEEE 802.3z 1000BASE-SX –Core/Outer 50/125um, Graded Index

9. 14/6/2000 End Cap Muon Trigger Review at CERN 9 Schedule LVDS link –Till summer test with an evaluation board will be completed including compensation circuits issues (Evaluation board is new product of National – it takes 2 months for delivery) –Then we will check the newer chipset with the same evaluation board G-Link –In autumn after LVDS test we will start extensively the G-link study