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ATLAS: Hardware and Upgrades Liverpool, HEP Christmas Meeting 17 December 2007 Paul Dervan.

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Presentation on theme: "ATLAS: Hardware and Upgrades Liverpool, HEP Christmas Meeting 17 December 2007 Paul Dervan."— Presentation transcript:

1 ATLAS: Hardware and Upgrades Liverpool, HEP Christmas Meeting 17 December 2007 Paul Dervan

2 Contents SCT ENDCAP-C past year Ashley, Katharine, Dave, George, Helen, Joost, Neil J, Neil T, Nick, Paul D, Paul P, Phil, Sergey, Scott, Tim + many SCT colleagues General ATLAS Super-LHC upgrade activities Ashley, Gianluigi, Joost, Neil, Peter, Phil, Tony +others joining

3 EC-C assembled in Liverpool. Last Year: Transported to CERN Tested and Repaired This year: Installation into ATLAS Service connections Warm tests Cooling installation 4 barrels 2 endcaps with 9 disks each ~60 m 2 of silicon strip detectors ~4000 modules 6.3 Million channels |η| < 2.5 Sct and Inner Detector

4 ID-C Status at end of 2006 SCT integrated into the TRT Models tested OK Cosmic ray tests carried out Waiting for installation into ATLAS

5 SCT EC Installation EC-C was moved to pit on June 18 th Plan was to move the week before (Friday) but due to rain postponed to Monday EC-C stayed the weekend in the unloading dock of SR1 The transport went very smoothly Only one crane was necessary to move EC from SR1 to SCX1 EC-C arrived in the pit around 11am Accelerations measured < 0.2g

6 SCT EC Installation Alignment of EC-C (Tuesday morning) and insertion was completed by 19h EC-C was positioned ~3.5mm away from its nominal position

7 SCT EC In Position

8 Phase 1 – Pre-Installation – June - July 2007 – (Complete) Phase 2 – LMTs (Connect & DC test) – August 2007 – (Complete) Phase 3 – Fibres (Connect & DwD) – August 2007 – (Complete) Phase 4 – Cooling installation – November - December 2007 Phase 5 – Power modules with cooling – January 2007 Sign off the End-cap (Pixel can now connect-up) Phase 6 – Full module readout with cooling – March 2007 SCT Installation and Commissioning

9 The rest of the ID Has been painful because of a short to LAr ground (insulation failure of the sliding rails). May 24 May 29

10 June 25 - June 28 2007 Pixel Installation

11 VA-A VA-C Ion pump Both Calorimeter beam pipes are now in position and connected to the Be pipe Calorimeter beam pipe installation

12 2 nd June 07 End-cap Toroids installation

13 ATLAS Inner Detector Upgrade To keep ATLAS running more than 10 years the inner tracker has to be replaced (Current tracker designed to survive up to 730 fb-1 10Mrad in strip detectors) For the luminosity-upgrade (SLHC) the new tracker will have to cope with >3000 fb-1 – much higher occupancy levels – much higher dose rates 10 16 n eq /cm 2 pixel b-layer 9×10 14 n eq /cm 2 middle layers 5×10 14 n eq /cm 2 outer layers For a new tracker by 2015, major international R&D programme already underway. (Current ATLAS Inner Detector TDR CERN/LHCC/97-16 is now 10 years old)

14 Pixels: Short (2.4 cm) -strips (stereo layers): Long (9.6 cm) -strips (stereo layers): r=5cm, 12cm, 18cm, 27cm r=38cm, 49cm, 60cm r=75cm, 95cm z=±40cm z=±100cm z=±190cm New SLHC Layout Including disks this leads to: Pixels: 5 m 2, ~300,000,000 channels Short strips: 60 m 2, ~28,000,000 channels Long strips: 100 m 2, ~15,000,000 channels

15 WP3: Sensors Comparison of measured collected charge on different radiation-hard materials and devices (M. Bruzzi, H. F.-W. Sadrozinski, A. Seiden, NIM A 579 (2007) 754–761) Signal (electrons) Signal vs Dose + + + Latest n-in-p data from Liverpool (1000V) Micron Semiconductor UK Ltd Liverpool are pushing the n-in-p sensor designs (Gianluigi)

16 WP3: Irradiated Microstrip CCE(V) 140mm and 300mm thickness (Micron) Doses up to 10 16 n eq /cm 2 (Ljubljana reactor neutrons ) Short microstrip layers to withstand 9×10 14 n eq /cm 2 (50% neutrons) at 500V with 750e - noise, can expect S/N 12 Tony Affolder, Gianluigi Case

17 WP4: SLHC Hybrid conceptual layout Digital I/O Power/Aux Bus 99mm MCC Power Regulation 24mm 74mm SENSOR Readout ASICs Ashley (provisional) 2 fingers per hybrid populated with 2 columns of 10 ASICs (40 ASICs total) Electrically one item? 4 Cu Layers with Kapton dielectric (example from LHCb VELO) Working closely with chip designers Working on how to layout the redundancy (various ways) HV MCC: Module Controller Chip

18 WP7: Single-sided Module Concept

19 Results Single-sided 1W/sensor Cooling -30 @8000W/m2 1W/Sensor 0.38W/Chip Max Chip temp: -10C Max Si Temp: -19.46C Temp Gradient over Si: 1.17C

20 Thermal Runaway - Temperature NB. Conductivity of air = 0 for ease of comparison!

21 Summary SCT: SCT End-cap C installed in ATLAS Awaiting final tests with the cooling Upgrade: Liverpool is involved (and leading) in quite a few areas The Upgrade effect is increasing all the time Merry Christmas

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