1. Mixed-Signal Option for the Teradyne Integra J750 Test System May08-12 Emily Evers Vincent Tai

2. Problem Statement The Teradyne system has been updated to allow for analog circuits to be tested, but there are no working test files for ADC, DAC and Op-Amps.

3. Concept Sketch and System Block Diagram Hardware IG-XL Software Devices Documentation Hardware Software

4. System Description Devices Analog-to-Digital (ADC) Digital-to-Analog (DAC) Op-Amp Hardware Device Interface Board (DIB) Connects daughter board to tester via pogo pins Daughter Board Connects device to DIB IG-XL Software Test Plan Pin and Channel Map AC and DC Specs Timing Pattern Documentation Updated Cookbook Commented IG-XL files 4

5. User Interface and Operating Environment User Interface IG-XL Software Cookbook DIB Operating Environment The room environment needs to be kept at a consistent temperature of 25°C ± 3° Electrostatic discharge wrist bands must be worn when using the tester Access code

6. Requirements Functional Cookbook be written for the new users Testing procedures covers the devices: Analog-to-Digital (ADC) Digital-to-Analog (DAC) Op-Amp Nonfunctional Documentation in English Test program for devices and similar ones Cookbook for specified devices Easy to trouble shooting

7. Market Survey Teradyne website Previous team’s website Teradyne lab manuals

8. Work Breakdown Structure Review Status Previous work Teradyne Training Material IC Interface Daughter Board DIB Test Plan Development Create IG-XL code for testing devices Debug previous code Add current limits New test plans Execute testing Documentation Create Mixed-Signal Option Cookbook Create maps for daughter board, DIB and socket converters Reporting

9. Project Schedule

10. Resource Requirements Resource Team Faculty Advisor: Dr. Weber Faculty Advisor: Dr. Smith Team effort Review Status IC InterfaceDACADCOp-AmpDocumentationReportingTotal hours Emily Evers30.751772951531.5135.25 Vincent Tai2218.51020151015110.5 Total52.7535.51749202546.5245.75 10

11. Resource Requirements Financial requirements ItemCost Materials Poster$35.00 Devices$130.00 Daughterboard$200.00 Subtotal$365.00 Labor($10.00/hr) Emily Evers$1352.5 Vincent Tai$1105 Subtotal$3562.5 Total$3927.5 11

12. Risks Risk: Problems learning program Limited team members Risk Management: Read Teradyne manuals and previous groups documentation Time management

13. Design Method InputsProcessOutputs Parts ADCDACOp-Amp AD7892 AD7470 AD5440 AD5447 AD823 Hardware Software Cookbook ADC & DAC INL & DNL Results Input/Output Signals Calculations Op-Amp Bandwidth Offset Voltages Intermodulation Tests IG-XL ProgramJ750 Tester Interfaces Computer DIB Daughterboard Socket converter

14. Input and Output Specification Input DAC LTC1450 Op-Amp AD823 ADC AD7470 Output Input signals Output signals Calculations ADC  INL and DNL DAC  INL and DNL Op-Amp  Offset Voltage  Bandwidth  Intermodulation Distortion

15. Hardware, Software, and User Interface Specification Hardware Daughterboard DIB Socket converter User Interface Updated Cookbook IG-XL test files Software Pattern Tool IG-XL Pin and Channel Maps AC, DC, and Global Specs Time sets and Pin Levels Test Procedures

16. Test Specification Component Test Test individual IG-XL source and capture System Test Test IG-XL test file and pattern

17. 17 Detailed Design DAC Schematic

18. 18 Detailed Design Op-Amp Schematic

19. 19 Detailed Design ADC Schematic

20. 20 Build – Pin Map Define pins on IG-XL

21. 21 Build – Channel Map Define connections from daughterboard to tester DAC

22. 22 Build – Channel Map Op-Amp

23. 23 Build – Channel Map ADC

24. 24 Build – Board Wiring

25. 25 Build – AC Specs Specify AC variables

26. 26 Build – DC Specs Specify DC variables

27. 27 Build – Pin Levels User specify voltage level for high/low logic level.

28. Build – Time Sets Create timing basis for pattern Allow for testing on digital pins 28

29. Build – Test Procedures Set up user defined tests 29

30. Build – Test Instances Set up IG-XL template tests Input data for user defined tests 30

31. Build – Pattern Uses time sets from IG-XL file User defined inputs Can be used to start analog and digital source and capture signals 31

32. Build – Pattern Several sheets are used in the pattern file Pin Lists Imports (time sets) Instruments 32

33. Test System testing was done using an oscilloscope 33

34. Test

35. Teradyne System Testing Functional Test Continuity Test 35

36. Test Functional and Continuity Outputs 36

37. 37 Earned Value Analysis Budgeted Cost of Work Scheduled: $4365 Actual Cost of Work Performed: $3650 Budgeted Cost of Work Performed: $3895 Cost Variance: $3530 Schedule Variance: -$470 Cost Performance Index: 1.067 Schedule Performance Index: 89.23%

38. 38 Lessons Learned Team Work The value of hands-on experience Verify Input Signals: Use oscilloscope and multimeter.

39. Conclusions Accomplishments Updated CprE 210 D-flip flop test Created an interface mapping of the current boards ADC Wired daughter board Created IG-XL test file Ran tests

40. 40 Conclusion Accomplishments DAC Wired daughterboard Created IG-XL test file Op-Amp Wired daughterboard Created IG-XL test file Updated Cookbook

41. Conclusions Future Work Run tests on DAC and Op-amp Fix if needed Finish ADC test file