2 Outline Binary Logic Representation of Logic Gates Constructing a 1-bit adderConstructing an n-bit adder
3 Binary Logic A computer works using digital electronics. There are only High and Low voltagesAll computer logic is based on the manipulation of theseAbstractly,High is interpreted as 1 (true)Low is interpreted as 0 (false)
4 Logic CircuitA logic circuit takes in a number of input lines (A, B, C, ...)and has a number of output lines (X,Y,Z,...)AXBYCZ
5 Logic Basics Every expression evaluates to 1 or 0 NOT OR AND ~A (“A bar”)is the complement of A, i.e. 1-AORA + Bis 1 if and only if at least one of A or B is 1, else 0ANDA.Bis 1 if and only if both A and B are 1, else 0
6 Truth Tables A B A+B A.B A ~A 0 0 0 0 0 1 0 1 1 0 1 0 1 0 1 0 1 1 1 1 A ~A0 11 0A B C A.B A.C B+C A.(B+C) A.B+A.CA.(B+C)=A.B+A.C
8 Representations of Integers Positive integers are represented by strings of binary digits - of fixed length given by the word length (eg, 32 bits).Numbers in the range 0 to can be represented.131LSBMSB
9 Negative NumbersWe have to have a way to represent negative numbers and 0.If the word length is n, then there are 2n bit-patterns possible - there cannot be an equal number of positive and negative numbers represented.Suppose n=3, and consider the following:000two = 0ten 100two = -4ten001two = 1ten 101two = -3ten010two = 2ten 110two = -2ten011two = 3ten 111two = -1ten
10 Two’s ComplementFor an n-bit word, the MSB is called the ‘sign bit’, which if 1 determines a negative number.An n-bit word: (bn-1bn-2...b1b0)two represents the decimal number:Eg, if n=4, 1101 = = -3.Eg, if n=5, = = -10
11 Negating a Number A simple technique for negating a number: Convert:- Invert each bit, and then add 1.Convert:-10110= = 2ten+8ten = 10ten1101= 0011 = 1ten + 2ten = 3ten0011= 1101 = -8ten+4ten+1ten = -3ten
12 ArithmeticBinary arithmetic, addition and subtraction are similar to decimal:work from least significant bit to most significant bitusing carries where necessary.A fundamental issue on a computer is the fixed word sizeThe operands and result is dependent on the word length, and sometimes the result will be too small (negative) or too large (positive) to be represented.
14 Overflow (Patterson)DecimalBinaryDecimal2’s Complement0000000010001-1111120010-2111030011-3110140100-4110050101-5101160110-6101070111-71001-81000Examples: = but = but ...1111111711- 43- 5+11+11111- 61117
15 Overflow Detection (Patterson) Overflow: the result is too large (or too small) to represent properlyExample: - 8 < = 4-bit binary number <= 7When adding operands with different signs, overflow cannot occur!Overflow occurs when adding:2 positive numbers and the sum is negative2 negative numbers and the sum is positive1111111711- 43- 5+11+11111-61117
16 Designing a 1-bit AdderA 1-bit adder must follow the following rules:-a b R Ca, b inputs, R result, C carry.
18 n-bit AdderProblem with previous circuit is that there is no way to combine a sequence of adders togetherthe carry of one addition must be passed to the next.Need a structure as:carryinabrcarryout
19 Truth Table Logic diagrams can be constructed for each of carryout and Result, using theresults below.Cout = a.(~b).c + a.b.(~c) + (~a).b.c + a.b.c= a.c+b.c+a.bResult = (~a).(~b).c + (~a).b.(~c) + a.(~b).(~c) + a.b.c
20 Logic Diagrams for CarryOut and Sum (Patterson) CarryOut = B & CarryIn | A & CarryIn | A & BResult = A XOR B XOR CarryInCarryInABCarryOutCarryInAResultB
21 Link 1-bit adders for n-bit carryinabr0carryout/carry inA chain of 1-bitadders is formedwhere the carryout of eachbecomes the carryin of thenext.The result is the sequenceof results from LSB to MSB.ar1bcarryout
22 (Patterson) Notice how the 1-bit adders are cascaded together. CarryIn0A01-bitALUResult0B0A1B11-bitALUResult1CarryIn1CarryOut1CarryOut0Notice howthe 1-bit addersare cascadedtogether.A2B21-bitALUResult2CarryIn2CarryOut2CarryIn3A31-bitALUResult3B3CarryOut3
23 Summary Binary logic Number representations Binary arithmetic two’s complementBinary arithmeticConstructing a 1-bit adderConstructing an n-bit adder...next time --- floating point.