1. PCB Layout Introduction
Wei Ren
Oct. 14th, 2009

2. Content System Analysis Power Distribution
Signal Lines as Transmission Lines
Crosstalk
EMI
Summary

3. System Analysis
Divide the whole system into several sub-systems by their functions:
Power sub-system: DC-DC converter (analog? digital?);
Linear regulator (analog? digital?);
±12V, ±5V, ±3.3V, etc. (analog? digital?);
etc.
Analog sub-system: Analog clock path;
Signal path 1, (Priority?)
Signal path 2, (Priority?)
Digital sub-system: Digital clock path;
Digital-to-analog path;
Digital control path;

4. Power Distribution
It is important to have a noise-free power distribution network, which also must provide a return path for all signals generated and received on the board.
1, Power Distribution Network as a Power Source
A, The effect of Impedance
A, Ideal case,
zero impedance
B, real case
Goal: Reduce the impedance of the power distribution
network as much as possible!!

5. Power Distribution B, Power Buses vs. Power Planes
Power Buses Power Planes
Power planes generally have better impedance characteristic than
power buses; Practical consideration might favor power buses.

6. Power Distribution C, Linear Noise Filtering
All the systems generate enough noise to cause problems. Since the power plane or buses does not eliminate line noise, extra filtering is required.
Solution:
Bypass capacitors acting as a filter are needed.
Generally, 1uF to 10uF caps are placed across the power input to the board to filter the low frequencies (like 60-Hz);
and 0.01uF to 0.1uF caps are placed across the power and ground pins of every active device on the board to filter the harmonics ( in the range of 100MHz and higher)

7. Power Distribution
Real capacitors have equivalent-series resistance (ESR) and equivalent-series inductance (ESL), so the real cap is a series resonant circuit, which has resonant freq,
Fr=1/(LC)1/2
It is capacitive at frequencies below Fr, and inductive at frequencies above Fr.
As a result, the capacitor is more a band-reject filter than a high frequency-reject filter.

8. Power Distribution Type Range of Interest Application
Table 1. Bypass Capacitor Groups
Type
Range of Interest
Application
Electrolytic
1uF to >20uF
Power-supply connection of board.
Glass-encapsulated Ceramic
0.01uF to 0.1uF
Bypass cap at the chip. Often placed in parallel with electrolytic to widen the filter BW and increase the rejection band.
Ceramic-chip
Primarily used at the chip.
C0G
<0.1uF
Bypass for noise-sensitive devices. Often used in parallel with another ceramic chip to increase rejection band.

9. Power Distribution Parallel the bypass caps to extend the range!
high-capacitance, low-ESL capacitor in parallel with a lower-capacitance, very-low-ESL capacitor.

10. Power Distribution Bypass Capacitors Placement:
1, Close to the active device, keep the connection as short as possible;
2, Close to the Vcc and GND.
Preferred Placement
Typical Placement

11. Power Distribution
2, Power Distribution Network as a Signal Return Path
Each time a signal switches, AC current is generated. Current requires a closed loop. The return paths are needed to complete the loop by Ground or Vcc.
Current loops have inductance. They can aggravate ringing, crosstalk, and radiation.
Equivalent AC path

12. Power Distribution
Table 2. Inductance of simple electrical circuits in air

13. Power Distribution
3, Layout Rules with Power Distribution Considerations
A, Protect the circuit from damage.
Put a fuse between the power supply and device to protect the system from damage caused by short circuit, overload or device failure.
B, Be careful with feedthroughs.
Common paths of signal return due to vias

14. Power Distribution C, Ground cables sufficiently Insufficient grounds
b) Enough grounds
lumped together
c) Grounds evenly
distributed among
signal lines

15. Power Distribution D, Separate analog and digital planes
On the boards with analog and digital functions, the power planes are separated; the planes are tied together at the power source. Place jumpers across the ground planes where signal cross to minimize the current loop.

16. Power Distribution E, Avoid overlapping separated planes
Do NOT overlap the power plane of digital circuitry and analog circuitry. If the planes overlap, there is capacitive coupling, which defeats isolation.
F, Isolate sensitive components
route other signals away from the
isolated section;
etch a horseshoe in the power
planes around the device;
add shielding box.

17. Power Distribution G, Place power buses near signal lines
Sometimes, power buses is the only choice when must use two-layer PCBs. It is possible to control loop size by placing the buses as close as possible to the signal lines. The loop for that signal is the same as it would be if the load used power planes.

18. Power Distribution H, Pay attention to the trace width
After estimate the current of each trace, calculate the trace width before route the wire. There are some use website as “PCB Trace Width Calculator”.
For example:

19. Signal Lines as Transmission Lines
When a signal delay is greater than a significant portion of the transition time, the signal line must treated as a transmission line.
where, L0 – distributed inductor, C0 – shunted capacitor
so we have Characteristic Impedance Z0=(L0/C0)1/2
Propagation Delay td=(L0C0)1/2

20. Signal Lines as Transmission Lines
General Transmission Line Categories:
Microstrip
Stripline
Twisted Lines
Parallel Lines

21. Signal Lines as Transmission Lines
Issues About Transmission Line
1, Impedance Matching
In order to maximize the power transfer and minimize reflection from the load. Should have ZS=ZL.
The reflection coefficient:

22. Signal Lines as Transmission Lines
Then we put the source, the load and the transmission line together. There are two boundaries which may generate reflections.
If miss-match, ringing is generated at the load.

23. Signal Lines as Transmission Lines
2, Noise Coupling Issue.
Example:
a, Coupling between 2 parallel lines, f=100kHz,TTL signal
Without coupling
With coupling, 800mV
b, Direct-coupler

24. Signal Lines as Transmission Lines
Layout Rules for TLs
A, Avoid Discontinuities.
at bends on the trace, keep the Zo constant.
A, poor
layout
B, shaving the
edge
C, by 45-degree
corner
D, by curve

25. Signal Lines as Transmission Lines
Vias take signal through the board to another layer. The vertical run of metal between layers is an uncontrolled impedance. So use the vias as few as possible

26. Signal Lines as Transmission Lines
B, Do NOT Use Stubs or Ts
a), stubs
b), preferred solution

27. Crosstalk
Crosstalk is the unwanted coupling of signals between traces. It is either capacitive or inductive.
1, Capacitive Crosstalk
Capacitive crosstalk refers to the capacitive coupling of signals between signal lines. It occurs when the lines are close to each other for some distance.

28. Crosstalk Solution: 1, terminating the load; 2, separating the traces;
3, put ground trace between the lines.

29. Crosstalk
The ground trace must be a solid ground. For good grounding, the ground trace should be connected to the ground plane with taps separated a quarter wavelength of the highest frequency component of the signal.

30. Crosstalk 2, Inductive Crosstalk
Inductive crosstalk can be thought of as the coupling of signals between the primary and secondary coils of an unwanted transformer
Transformer equivalent
Inductive crosstalk

31. Crosstalk Crosstalk Solutions Summary
The effect of both capacitive and inductive crosstalk increases with load impedance. Thus all lines susceptible to interference due to crosstalk should be terminated at the line impedance;
Keeping the signal lines separated reduces the energy that can be capacitively coupled between signal lines;
Capacitive coupling can be reduced by separating the signal lines by a ground line. To be effective, the ground trace should be connected to the ground every quarter wavelength long;
For inductive crosstalk, the loop size should be reduced as much as possible
For inductive crosstalk, avoid situations where signal return lines share a common path

32. EMI
Electromagnetic Interference (EMI) can be reduced through shielding, filtering, eliminating current loops, and reducing device speed where possible.

33. Summary Analyze the circuit well before start layout the PCB;
Integrity and stability of power and ground;
Termination and careful layout of transmission lines to eliminate reflections;
Termination and careful layout to reduce the effects of capacitive and inductive crosstalk;
Noise suppression for compliance with radiation regulations.