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Fabrication of semiconductor GEMs

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Presentation on theme: "Fabrication of semiconductor GEMs"— Presentation transcript:

1 Fabrication of semiconductor GEMs
Why GEMs are still made from kapton Liam Cunningham Lunchtime talk 19/01/06

2 Overview Historical info on GEMs Development of current devices
What, how etc. Development of current devices New developments in GEM technology i.e. what I’ve been doing for 2 years Liam Cunningham Lunchtime talk 19/01/06

3 What is a GEM? Unfortunately, not one of these Liam Cunningham
Lunchtime talk 19/01/06

4 Gaseous Electron Multipliers GEM’s are
A type of micro-pattern gas detector which has been developed for use in applications requiring high gain, high speed and low noise measurement Electron Multipliers Liam Cunningham Lunchtime talk 19/01/06

5 History of GEMs First demonstrated by F. Sauli (NIM A 386 ( 1997) 53 l-534) The GEM foil consists of two metal electrodes separated by an insulating film (kapton, polyimide, PCB) Liam Cunningham Lunchtime talk 19/01/06

6 History of GEMs Schematics of first test GEM structure. GEM placed inside an MWPC to replace one of the cathodes F. Sauli (NIM A 386 ( 1997) 53 l-534) Liam Cunningham Lunchtime talk 19/01/06

7 History of GEMs GEM’s are used to amplify charge created by incident radiation utilising the avalanche effect. Electron (good) Ion (bad) GEM Charge detector (microstrip?) photon or particle Pressurised gas mixture Liam Cunningham Lunchtime talk 19/01/06

8 History of GEMs Electric field GEM foil (red lines) Electrons
Liam Cunningham Lunchtime talk 19/01/06

9 History of GEMs Close up of GEM field line distribution
L. Shekhtman NIM A 494 (2002) 128–141 Liam Cunningham Lunchtime talk 19/01/06

10 History of GEMs Theory of avalanche gain in gas detectors
The total multiplication or gas gain from an electron travelling from cathode to anode is given by : Where a is the Townsend constant, integrated over the transit distance from cathode to anode Liam Cunningham Lunchtime talk 19/01/06

11 History of GEMs Theory of avalanche gain in gas detectors
The Townsend constant is related to the low current, corona discharge region of an ionising gas Liam Cunningham Lunchtime talk 19/01/06

12 History of GEMs Theory of avalanche gain in gas detectors
Assuming a kinetic model were W is the minimum ionisation energy we get (1) Were l is the mean free path and E is the electric field Liam Cunningham Lunchtime talk 19/01/06

13 History of GEMs Theory of avalanche gain in gas detectors
Taking s as the cross section for ionisation between electrons and gas atoms gives were NL is Loschmidts number given by NA Avogadros number, R the gas constant, P/T ambient pressure/ temp (2) (3) P/T can be expressed as the ratio (4) Liam Cunningham Lunchtime talk 19/01/06

14 History of GEMs Theory of avalanche gain in gas detectors
Combining these we get (6) Defining we can re-write (6) as (6a) Were W and lq are physical parameters of the gas it is easy to see that the gain depends on E and q Liam Cunningham Lunchtime talk 19/01/06

15 History of GEMs F. Sauli (NIM A 386 ( 1997) 53 l-534) Liam Cunningham
Lunchtime talk 19/01/06

16 Development of GEM foils
Gain of single GEM foil in Ar-CO2 atmosphere at atmospheric pressure (J. Benlloch et al. NIM A 419 (1998) ) Liam Cunningham Lunchtime talk 19/01/06

17 Development of GEM foils
Variation in time response of gain for different hole profiles (J. Benlloch et al. NIM A 419 (1998) ) Liam Cunningham Lunchtime talk 19/01/06

18 Development of GEM foils
Use of GEM foils for neutron detection using a PP converter V. Dangendorf et al. NIM A 535 (2004) 93–97 Liam Cunningham Lunchtime talk 19/01/06

19 Development of GEM foils
Images taken using GEM based neutron imaging system using a position sensitive readout system V. Dangendorf et al. NIM A 535 (2004) 93–97 Liam Cunningham Lunchtime talk 19/01/06

20 Development of GEM foils
Schematic of multi-GEM system utilising different photocathodes, readout is by microstrip detector D. M.ormann et al. NIM A 504 (2003) 93–98 Liam Cunningham Lunchtime talk 19/01/06

21 Development of GEM foils
Time response from semi-transparent cathode multi-GEM system detecting UV photons D. M.ormann et al. NIM A 504 (2003) 93–98 Liam Cunningham Lunchtime talk 19/01/06

22 Development of GEM foils
Liam Cunningham Lunchtime talk 19/01/06

23 Development of GEM foils
Other areas for experimentation and development include: Low pressure GEM operation R. Chechik et al. NIM A 419 (1998) Cryogenic GEM operation A. Bondar et al. NIM A 524 (2004) 130–141 Liam Cunningham Lunchtime talk 19/01/06

24 GEM applications Atmospheric pressure and above, GEMs can be used as an amplifier stage for detection of lightly interacting particles i.e. MIPS. No further amplification is required in this case Neutron detector with converter. Low pressure detectors with CsI photocathode for ultra soft x-rays and UV photons in single electron counting operation RICH detectors Liam Cunningham Lunchtime talk 19/01/06

25 Semiconductor GEMs Fabrication of GEM foils from rigid semiconductor or insulating substrates is desirable for a number of reasons Removes effect of sagging as device is powered up Use of reactive gas mixtures could be explored Higher possible baking temperature (improved sealing of vacuum chambers) Greater density of holes possible due to existing advanced lithography and processing technology Liam Cunningham Lunchtime talk 19/01/06

26 Semiconductor GEMs Very small features and pitches produced in Si using dry etch technology Liam Cunningham Lunchtime talk 19/01/06

27 Semiconductor GEMs Liam Cunningham Lunchtime talk 19/01/06

28 Semiconductor GEMs: Design for test device
Test structure with 4 different hole diameters 80 – 200 mm Liam Cunningham Lunchtime talk 19/01/06

29 Semiconductor GEMs: Design for test device
Close up on single hexagonal cell Single test pattern Liam Cunningham Lunchtime talk 19/01/06

30 Semiconductor GEMs: Metallisation
The device structure as shown here is a metallic layer with an insulating material separating them. This implies we need to passivate the Si surface and then apply a metallic film. Liam Cunningham Lunchtime talk 19/01/06

31 Semiconductor GEMs: Metallisation
Preliminary attempts used a PECVD (plasma enhanced chemical vapour deposition) layer of SiO2 with 200 nm of Au as the metallisation. The problem is gold doesn’t stick very well. Liam Cunningham Lunchtime talk 19/01/06

32 Semiconductor GEMs: Metallisation
Metallisation recipe changed to include Ti adhesion layer, this successfully survives several future processing steps. Liam Cunningham Lunchtime talk 19/01/06

33 Semiconductor GEMs: Etching passivation layer
Schematic of reactive ion etching (RIE) plasma reactor Liam Cunningham Lunchtime talk 19/01/06

34 Semiconductor GEMs: Etching passivation layer
The theory of the RF plasma operating in glow discharge regime starting from the force exerted on a single electron then taking the x component of the motion and substituting the sinusoidal electric field it is possible to define the power absorbed by the gas nc= neutral collision frequency E= electric field ne= number density of electrons w= E field frequency m=electron mass Eo= max field strength Liam Cunningham Lunchtime talk 19/01/06

35 Semiconductor GEMs: Etching passivation layer, problems
None. This is the only step that never had any problems Liam Cunningham Lunchtime talk 19/01/06

36 Semiconductor GEMs: Etching Si
Schematic of inductively coupled plasma (ICP) reactor Liam Cunningham Lunchtime talk 19/01/06

37 Semiconductor GEMs: Etching Si
The ICP upper chamber this is what creates the denser plasma responsible for the faster etching rate. The frequency is fixed at MHz the power can be varied depending on the attached power supply. Liam Cunningham Lunchtime talk 19/01/06

38 Semiconductor GEMs: Etching Si
Parameters for ICP etching Coil power: Determines the density of the plasma in the upper chamber Platen power: determines the potential difference accelerating ions towards the surface Pressure: has an effect on the transfer of ionic species into and out of the etched features Liam Cunningham Lunchtime talk 19/01/06

39 Semiconductor GEMs: Etching Si
SF6/ O2 mixture used for etching the initial features. Preferentially etching vertically Plasma chemistry switched to C4F8 This causes a build up of polymer over all surfaces Liam Cunningham Lunchtime talk 19/01/06

40 Semiconductor GEMs: Etching Si
Switching the plasma gasses back to SF6/O2 starts etching again Liam Cunningham Lunchtime talk 19/01/06

41 Semiconductor GEMs: Etching Si, problems 1
ICP (inductively coupled plasma) etching of Si is very sensitive parameter sensitive. Incorrect choice of any of the parameters can lead to non-successful etch. Recipe design is a fairly time and material intensive process Liam Cunningham Lunchtime talk 19/01/06

42 Semiconductor GEMs: Etching Si, problems 1
Wrong pressure causes feature to close up towards the bottom. This stops etching after a given depth. low pressure high pressure Liam Cunningham Lunchtime talk 19/01/06

43 Semiconductor GEMs: Etching Si, problems 1
Varying the platen power modifies the profile of the hole. low platen power high platen power Liam Cunningham Lunchtime talk 19/01/06

44 Semiconductor GEMs: Etching Si, problems 1
Excess passivation build up caused by poor cycle time selection Liam Cunningham Lunchtime talk 19/01/06

45 Semiconductor GEMs: Etching Si, problems 1
But, why are these all serious fatal flaws With poor parameter choice, and subsequent poor etch profile the depth, diameter and actual shape of the etched features is pretty vague Liam Cunningham Lunchtime talk 19/01/06

46 Semiconductor GEMs: Etching Si, problems 1
These images are of the two ends of the same hole. Obviously there is a problem, they aren’t circular and they’re different sizes Liam Cunningham Lunchtime talk 19/01/06

47 Semiconductor GEMs: Etching Si, problems 1
Improved shape, high mask erosion is causing damage to metal surface Liam Cunningham Lunchtime talk 19/01/06

48 Semiconductor GEMs: Etching Si, problems 1
Circular holes ,reduced mask erosion but still causing damage to metal surface Liam Cunningham Lunchtime talk 19/01/06

49 Semiconductor GEMs: Etching Si, problems 1
Round holes. No surface damage Liam Cunningham Lunchtime talk 19/01/06

50 Semiconductor GEMs: Etching Si, problems 1
The parameters for the successful etch are as follows Coil:    900W (etch) / 800W (dep) Platen:    13W (etch) / 0W (dep) Etch:    SF6/O2 = 130 / 13 sccm Deposition:    C4F8 = 110 sccm Switch:    11s (etch) / 7s (dep) Pressure: ~30 mtorr   This process produces an etch rate of mm/min Liam Cunningham Lunchtime talk 19/01/06

51 Semiconductor GEMs: Etching Si, problems 1
Liam Cunningham Lunchtime talk 19/01/06

52 Semiconductor GEMs: Etching Si, problems 2
ICP switched process etch does not etch SiO2 Need to align from the other side to be able to etch both SiO2 layers Liam Cunningham Lunchtime talk 19/01/06

53 Semiconductor GEMs: Etching Si, problems 2
First attempt at aligning front to back a complete and utter mismatch Liam Cunningham Lunchtime talk 19/01/06

54 Semiconductor GEMs: Etching Si, problems 2
Kaleidoscope effect from partial rotational mismatch Liam Cunningham Lunchtime talk 19/01/06

55 Semiconductor GEMs: Etching Si, problems 2
Fully etched device holes circular and properly aligned. Looks suitable for testing Liam Cunningham Lunchtime talk 19/01/06

56 Semiconductor GEMs: Etching Si, problems 2
Liam Cunningham Lunchtime talk 19/01/06

57 Semiconductor GEMs: Testing devices
Constant current ~ 1mA over large voltage range need to get lower current, implying better field characteristics Liam Cunningham Lunchtime talk 19/01/06

58 Semiconductor GEMs: Testing devices
What to do? Change oxide layer, PECVD oxide has lower resistivity and break down field than thermal oxide. Other problems relating to integrity of the layer Liam Cunningham Lunchtime talk 19/01/06

59 Semiconductor GEMs: Testing devices
Very low current <5 pA over large range looks very promising Liam Cunningham Lunchtime talk 19/01/06

60 Semiconductor GEMs: Testing devices
Liam Cunningham Lunchtime talk 19/01/06

61 Semiconductor GEMs: Testing devices
Measurements of changing current as a b source is applied and removed from the sample. Liam Cunningham Lunchtime talk 19/01/06

62 Semiconductor GEMs: Testing devices
Liam Cunningham Lunchtime talk 19/01/06

63 Semiconductor GEMs: Testing devices
Until this was discovered Liam Cunningham Lunchtime talk 19/01/06

64 Semiconductor GEMs: What next?
Tests showed short between the metal layers and the Si. Ti diffusion causing conductive TixOy at hole edge Solution. Change metal again. Use Pd, very low diffusion in SiO2, sticky unlikely to come off. Other angle looking at only using one SiO2 layer to cut down the possibilities of shorts developing Liam Cunningham Lunchtime talk 19/01/06

65 Semiconductor GEMs: What next?
Use Quartz substrate, this has one really big advantage, No need for separate passivation This also removes the likelihood of shorts Sounds perfect Problem, cannot get dry etching facilities for deep etching in quartz and wet etching is too isotropic for very deep etching Liam Cunningham Lunchtime talk 19/01/06

66 Semiconductor GEMs: Recent developments
Unfortunately not many. The STS ICP has been down since June. Came back on line last week, making 12 months of down time in the last 26. Samples are being etched now with Pd metallisation. Masks designed for etching of quartz substrate Liam Cunningham Lunchtime talk 19/01/06

67 Semiconductor GEMs: Future developments
Adding additional Si3N4 to SiO2 surface to reduce possibility of interface effects The next few weeks will produce more completed devices for testing Liam Cunningham Lunchtime talk 19/01/06

68 ICP theory Liam Cunningham Lunchtime talk 19/01/06


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