1. CDA 3101 Fall 2013 Introduction to Computer Organization I/O Devices and Buses 15 November 2013

2. Overview of I/O and Buses Movement of data and instructions Parallel or Serial buses Different I/O protocols I/O devices vary widely Bus Performance Equations Types of I/Os –Polled: Device-specific queries –Interrupt-Driven: On-demand transfer –DMA: Fast transfer, block I/O

3. Bus Configuration Transmitter/Receiver: Source/Sink for data Channel: Path for data or instructions Controller: Master control for bus actions Base Reg sw lw Offset BUS

4. I/O Types 1.Polled –Check each I/O device in turn, schedule I/O work on appropriate idle devices –Ask for device status (busy, wait, idle, dead…) 2.Interrupt-Driven –On-demand request of I/O services –Needs queue to save waiting I/O requests 3.Direct Memory Access (DMA) –Direct I/O Device to Memory Transfer –Very fast, used for large amounts of data (e.g., video, imagery, audio)

5. Physical vs. Logical I/O Buses Physical Buses –Installed in Computer: ISA bus for graphics card –Limited by size and power supply of processor –Performance limited by bus width, controller speed Logical I/O (reconfigurable buses) –Have physical buses available that can be configured differently –Useful for maximizing bus utilization –Make the CPU believe it has variable buses –Reconfigure buses to meet current I/O demand –Requires complex bus controller and scheduling software

6. Physical Buses Parallel Bus –N wires in parallel: –Advantage: Fast Disadvantage: Complexity Serial Bus –One transmission path –Usually twisted pair (for alternating current) –Can be shielded (coaxial cable or Ethernet) –Simplex communication: Unidirectional –Duplex communication: Bi-directional –Problems: Collision (duplex), Errors, Faults –Advantage: Simplicity Disadvantage: Slow N

7. Bus Performance Parameters Bandwidth or Throughput –How much data can be transmitted through the bus per unit time (Units = Bits per Second) Failure Rate and Cost –Rate: Probability of Bus failing –Cost: How much overhead required to restart Need to flush bus (cycles of bus x bits per cycle) Resend corrupted packets (bits to be resent) Error Rate and Cost –Similar to Failure Rate

8. Bus Performance Equations Assumptions –Bandwidth (B), Bit Error Rate (BER) –Failure Rate (FR), Failure Cost (FC) in bits/sec Computation of Actual Bandwidth (B’) B’ = B x (1-BER) - FC/(1-FR) Error EffectFailure Penalty

9. Bus Performance Example #1 Assumptions –Nominal Bandwidth: 32 MHz, 32 bits parallel –Failure Rate = 10 -4 ; Failure Cost = 0.2 Mbps –Bit Error Rate = 10 -6 Computation of Actual Bandwidth (B’) B’ = B x (1-BER) - FC/(1-FR) = 32bits(32 x 10 6 Hz) (0.999999) - (0.2 x 10 6 bps/ 0.9999) = 1.023999 Gbps – 0.20002 Mbps = 1023.799 Gbits/sec = 0.02% penalty

10. Bus Performance Example #2 Assumptions –Nominal Bandwidth: 32 MHz, 32 bits parallel –Failure Rate = 10 -1 ; Failure Cost = 0.2 Mbps –Bit Error Rate = 10 -6 Computation of Actual Bandwidth (B’) B’ = B x (1-BER) - FC/(1-FR) = 32bits(32 x 10 6 Hz) (0.999999) - (0.2 x 10 6 bps/ 0.9) = 1.023999 Gbps – 0.2222 Mbps = 1023.7768 Gbits/sec = 0.03% penalty

11. Bus Performance Example #3 Assumptions –Nominal Bandwidth: 32 MHz, 32 bits parallel –Failure Rate = 10 -1 ; Failure Cost = 0.2 Mbps –Bit Error Rate = 10 -3 Computation of Actual Bandwidth (B’) B’ = B x (1-BER) - FC/(1-FR) = 32bits(32 x 10 6 Hz) (0.999) - (0.2 x 10 6 bps/ 0.9) = 1.022976 Gbps – 0.2222 Mbps = 1023.7538 Gbits/sec = 0.23% penalty

12. Bus Performance Reality Problems –Bus collision: Packets try to use same HW –Simplex: Less Collision, Duplex: More collision Some practical test results PCI: 32 bits parallel at 32 MHz (128MB/s) Nominal BW = 1K MHz ~ 1GHz Simplex:70-80% of BW Duplex: 20-40% of BW e.g., Duplex => 25 to 50 MB/s

13. Bus: Application => Requirements Applications –Imaging: MxN pixels per frame, K bits per pixel –Video: F frames per second Complexity = O(MNKF) bits per second Real:M,N = 1024, K = 24 bpp, F = 30 fps MNKF = 1M (720) = 720 Mbits/sec Simplex:720 Mbps / 0.7 => B = 1.03 Gbps Duplex:720 Mbps / 0.3 => B = 2.4 Gbps Lesson: Fast buses are required for imaging

14. Bus Technologies Current –Copper wires, Traces on circuit board (2-8 GHz) –Coaxial, Fiber optic Internet (100Mbps to 2 Gbps) Emerging –Free space optical: 20+ Gbps BW limited by transmitter/receiver bandwidth Problems with atmospheric scattering & absorption –“All optical” Isn’t so – need some electronics and electro-optics Speed limited by bandwidth of electronics Foreseeable Future: Fiber Optic, Wireless

15. Conclusions I/O effects data transfer by: –Dividing data stream into blocks or packets –Sending data packets serially along a bus –Keeping the I/O bus almost always full (occupied) to maximize I/O system throughput Reconfigurable Buses are useful because: –Different I/O intensive applications have different I/O requirements –Bus configuration can adapt to meet requirements Next: Multiprocessors

16. The Best Part of the Week Is Near: WEEKEND!!