1. Dept. of Communications and Tokyo Institute of Technology
1. VLSI　Overview
Hiroaki Kunieda
Dept. of Communications and
Computer Engineering
Tokyo Institute of Technology

2. Outline What is VLSI ? Classification Current Industry
Design Hierarchy

3. 1.1　VLSI

4. 1. What is VLSI ?
Circuit System implemented on the surface of semiconductor, consisting of
Transistors (MOS or bipolar tr.)
connecting wires
One chip consists of 10 Million Gates or 40 Million Transistors in one circuit.
Performance is decided not only by
Circuit configuration
Placement of transistors and connection schemes of connecting wires

5. SoC (System_on_Chip) Example
process
0.18um CMOS/6M1P
package
360 TFBGA
Power supply
3.3V (I/O), 1.8V(core)
RISC speed
200MHz
SRAM
32KB
ROM
64KB
SoC die size
5mm x 5mm
Soc gate count
1400K
We have finished the design, and have manufactured the SoC.
The typical characteristic is like:
…..
SoC layout

6. Manufacturing on Wafer
A series of identical chips are patterned onto the Wafer.
Some space is reserved for
test circuit structures.

7. Example of Process Put tubs into wafer.
Form an oxide covering on wafer and the polysilicon wires.
Diffusion (wires) (polysilicon masks the formation of diffusion wires.=self-aligned)
Metal connections are made with filling cuts (via) to make connections after another oxide layer is deposited.

8. Wiring Processes

9. Example of Complex Layout

10. 1.2 Classification

11. Manufacture 1.Monolithic LSI Made of one semiconductor 1.1 Silicon LSI
Silicon is used as substrate.
　　　1.1.1 MOS　LSI
MOS technology such as MOS transistors are employed.l
　　　　 　　CMOS　LSI
nMOS and pMOS are used to reduce power consumption.
　　　　 　NMOS　LSI
nMOS (Enhancement and Depletion Types) are used for smaller area.
　　　1.1.2 Bipolar LSI
High speed is achieved, but complicated fabrication process, suitable for Analog LSI.
1.2　GaAs LSI
2. Hybrid LSI
Semiconductor is used for high frequency use.
Semiconductor chip and other components on thin film substrate.

12. Design Method Standard Design --------- Design by maker’s spec.
Full Custom Design Design of all masks by customer’s spec.
Manual Design
Cell-Based Design
Custom Cell/ Full Custom Design
Standard Cell Design
Semi Custom Design Design of routing wire & logic functions by customer’s spec.
Gate Array
FPGA Design

13. Structure of LSI Wire Wire Wire Wire Source Drain Sorce Drain ｎMOS
gate
gate
Source
Drain
Sorce
Drain
ｎMOS
pMOS
P-Well
Silicon Substrate (n)

14. 1.3 Semiconductor Industry

15. Size of Industry (2006) Automobile 700 B$ Semiconductor 28 B$
Microprocessor
DRAM, flashROM
SoC
Analog, Discrete
Digital Consumer Electronics
　　350 B$
Cellular
Phone
140 B$
　　　PC
　　3２0 B$

16. Growth Forecast 20 15 10 5 Growth Rate (%) ■NAND FlashROM ■sensor
Growth Rate (%)
■NAND FlashROM
■sensor
■Analog
■DSP
■MPU ■
specific logic
■DRAM
■MCU B$
Market

17. Moore’s Law and Intel microprocessors
The transistor counts would double every 18 months.
microprocessor
Date of introduction
#transistors
Feature size (microns)
80286
134,000
1.5
80386
275,000
80486
1,200,000
1.0
Pentium
3,100,000
0.8
Pentium pro
5,500,000
0.6
Pentium II
1997
9,500,000
0.25
Pentium III
2001
42,000,000
0.18
Dual Core
2008
0.065

18. 1.4 Design Hierarchy

19. Design Partitioning Architecture: User.s perspective, what does it do?
Instruction set, registers
MIPS, x86, Alpha, PIC, ARM, .
Micro architecture
Single cycle, multcycle, pipelined, superscalar?
Logic: how are functional blocks constructed
Ripple carry, carry lookahead, carry select adders
Circuit: how are transistors used
Complementary CMOS, pass transistors, domino
Physical: chip layout
Datapaths, memories, random logic

20. Microprocessor ＣＰＵ Execution Unit Control Unit registers
DRAM (Main Memory)
ＣＰＵ
fetch instruction from main memory and send it to control unit
control unit gets instruction and control execution units and registers to execute command of instructions.
Data are manipulated according to commands
send data from registers (source) to execution units
execution has been performed by execution units
results is sent to register (destination)

21. Micro operations Micro operations are performed by one clock
corresponding to register transfer logic.
Processor works according to instructions (machine
codes), which are a sequence of micro operations.
As an example, ADD instruction is performed as
1. ADD instruction is transferred from memory to inside.
2. the data is sent to Instruction Register.
3. the instruction is decoded and its information is sent to
control execution.
4. the required data for addition is transferred from
specified register to execution units such as ALU.
5. ALU executes addition.
6. the result is sent to the destination register.

22. ＲＴＬ ALU A B S Load_A Load_B Load_C clock Register A Register B
Register C
clock

23. ALU (Arithmetic and Logic Units)B
A　００１１　　　３
B　１０１０　　１０
Ｓ　１１０１　　１３ ＋）
ALU
ALU performs arithmetic and logic operations
for 2 input data as A and B and to produce
the result S.
Operations are specified by control signals. S

24. 1 bit Adder D a b
head
carry_out
sum
head_out 1

25. Master-Slave Flip Flop
rst
clk
~clk D Q
~clk
clk
~clk
clk
~clk
clk

26. Clocked Inverter
~clk
~clk IN IN
OUT
clk
clk

27. Operation of Transister
High Voltage Input
Low Voltage Input
Switch ON
Switch OFF

28. Layout Pattern of LSI
Silicon Substrate
Gate
wiring

29. Ｄｅｓｉｇｎ Ｍｅｔｒｉｃｓ  Cost (chip area)  Reliability (design margin
Ｄｅｓｉｇｎ　Ｍｅｔｒｉｃｓ
 Cost (chip area)
 Reliability (design margin
 Scalability (expansion to larger system)
 Speed (delay, operating frequency)
 Power dissipation (Heat problem, battery Drive)
 Energy to perform a function