1. TALENT Summer School, June 2013 1 Monolithic pixel sensors Ivan Perić

2. TALENT Summer School, June 2013 Monolithic vs. hybrid detectors Monolithic pixel sensor Monolithic - formed from a single crystal Pixel sensor - segmented detector of visible light or radiation Sensor pixel chip Readout pixel chip Sensor chip Hybrid detector n 2 chip to chip connections Monolithic detector Output signal Readout block

3. TALENT Summer School, June 2013 Overview of monolithic sensors Monolithic pixel sensors – three classes 1) Pixel sensors implemented in commercial CMOS technologies 2) Special monolithic technologies (DEPFETs, SOI-detectors) 3) Monolithic sensors obtained by 3D integration

4. TALENT Summer School, June 2013 4 Commercial (C)MOS monolithic pixel sensors

5. TALENT Summer School, June 2013 (C)MOS monolithic sensors The original application of CMOS sensors – consumer electronics Imaging sensors for digital cameras and mobile phones Such sensors be used for particle tracking, however… certain improvements are necessary Epi layer, hi-resistivity substrate, deep-n-well, use of true CMOS pixels Although implemented in CMOS technologies commercial imagers use only one type of transistor in pixels – (C)MOS Phone with 41 M pixel sensor, 1.4um pixel size

6. TALENT Summer School, June 2013 Commercial imaging sensors Imaging sensors for digital cameras and mobile phones Two basic types CMOS sensor and CCD Canon 120 M pixels, 2um pixel size Teledyne DALSA 60 M pixels CCD, 6um pixel size 29 mm 54 mm

7. TALENT Summer School, June 2013 MOS technology MOS Technology – Integrated circuit technology based on Metal Oxide Semiconductor field effect transistors Field effect transistor invented in 1925 by Julius LilienfeldJulius Lilienfeld Finally realized in 1960s Silicon p type n type region “diffusion” „Metal“ ElectrodeInsulator Samsung 32nm process

8. TALENT Summer School, June 2013 PN junction The simplest building element – PN junction N-diffusion – potential valley for electrons P-substrate –potential barrier for electrons Silicon n typeSilicon p type Free electrons

9. TALENT Summer School, June 2013 PN junction Reversely biased – large depleted layer Detector mode Silicon n typeSilicon p type + Depleted

10. TALENT Summer School, June 2013 PN junction Directly biased – current flow Not used in MOS circuits Silicon n typeSilicon p type +

11. TALENT Summer School, June 2013 PN junction as sensor of radiation PN junction as sensor 1. step - ionization Atoms Photons or particles Ionisation Free e-

12. TALENT Summer School, June 2013 PN junction as sensor of radiation PN junction as sensor 2. step – charge collection Two possibilities for charge collection – drift (through E-force) and by diffusion (density gradient) Atoms Collection of electrons

13. TALENT Summer School, June 2013 PN junction as sensor of radiation PN junction as sensor 3. step – charge to voltage conversion Collection of the charge signal leads to the potential change AtomsPotential change

14. TALENT Summer School, June 2013 MOS transistor The basic element – MOS field effect transistor Potential barrier between the transistor contacts can be controlled by the voltage applied at gate electrode N-channel MOS - NMOS Silicon p type N-type diffusion-regions (drain and source) „Metal“ Electrode (Gate) Insulator Gate

15. TALENT Summer School, June 2013 MOS transistor Current flow controlled by gate-bulk voltage Silicon p type Insulator

16. TALENT Summer School, June 2013 MOS transistor Interesting: Current flow does not depend on drain voltage Silicon p type Insulator

17. TALENT Summer School, June 2013 MOS transistor Current flow controlled only by gate-bulk voltage Silicon p type Insulator

18. TALENT Summer School, June 2013 CMOS pixel Pixel sensor in MOS technology N-type region Diffusion (shallow) Or well (deep) Sensor-junction MOS FET Sensor-junction MOS FET Gate

19. TALENT Summer School, June 2013 CMOS pixel N in P diode acts as sensor element – signal collection electrode N-type region Diffusion (shallow) Or well (deep) Sensor-junction MOS FET Sensor-junction MOS FET Gate

20. TALENT Summer School, June 2013 CMOS pixel Charge generated by ionization is collected by the N-diffusion This leads to the potential change of the N-diffusion The potential change is transferred to transistor gate – it modulates the transistor current N-type region Diffusion (shallow) Or well (deep) Sensor-junction MOS FET Sensor-junction MOS FET Gate

21. TALENT Summer School, June 2013 Rolling shutter readout Readout principle: Many pixels (usually one row) share one readout line Additional MOSFET used as switch The readout lines lead to the electronics at the chip periphery that does signal processing Monolithic detector – signal processing on the chip - fast A AAAAA Switch Pixel i+1 Pixel i Periphery of the chip

22. TALENT Summer School, June 2013 CCD principle CCD principle as comparison Potential valleys and barriers in silicon formed by proper doping. They are controlled applying voltages on metal electrodes

23. TALENT Summer School, June 2013 CCD principle Illumination, ionization and charge collection

24. TALENT Summer School, June 2013 CCD principle Shifting of the charge Two voltage pulses are used to raise and lower the barriers

25. TALENT Summer School, June 2013 CCD principle Shifting of the charge

26. TALENT Summer School, June 2013 CCD principle Shifting of the charge

27. TALENT Summer School, June 2013 CCD principle Charge signals are shifted to the external amplifier No conversion to voltage occurs Amplification and signal processing on separated chip Slow readout

28. TALENT Summer School, June 2013 28 (C)MOS monolithic pixel sensors for particle tracking

29. TALENT Summer School, June 2013 CMOS sensors for particle tracking Can CMOS structure be used for detection of high energy particles in particle tracking? Yes, but fill factor is an issue – ratio of the sensitive versus insensitive area DetectedNot detected Charge collection by drift Absorbed by electronics

30. TALENT Summer School, June 2013 Fill-factor Partial signal collection in the regions without E-field

31. TALENT Summer School, June 2013 Fill-factor Partial signal collection in the regions without E-field Recombination

32. TALENT Summer School, June 2013 Overview Partial signal collection in the regions without E-field Recombination

33. TALENT Summer School, June 2013 Overview Partial signal collection in the regions without E-field Charge collection by diffusion

34. TALENT Summer School, June 2013 Fill-factor Partial signal collection in the regions without E-field Charge collection by diffusion

35. TALENT Summer School, June 2013 Fill-factor In the case visible light imaging, the insensitive regions do not impose a serious problem Light can be focused by lenses Exposure time can be increased In the case of particle tracking, any insensitive region should be avoided

36. TALENT Summer School, June 2013 MOS pixel sensor with 100% fill factor MOS sensor with 100% fill-factor Based on epi-layer Monolithic active pixel sensor - “MAPS” Lightly p-doped epi-layer Heavily p-doped P-well N-diffusion or N-well MOS FET NMOS

37. TALENT Summer School, June 2013 MOS pixel sensor with 100% fill factor Ionization in the epi-layer Charge collection by diffusion N-diffusion or N-well Particle

38. TALENT Summer School, June 2013 38 MAPS

39. TALENT Summer School, June 2013 39 MOS pixel sensor with 100% fill factor - MAPS MAPS NMOS transistor in p-wellN-well (collecting region) Pixel i Charge collection (diffusion) P-type epi-layer P-type substrateEnergy (e-)

40. TALENT Summer School, June 2013 MAPS Many institutes are developing MAPS, for instance: IPHC Strasbourg (PICSEL group) Family of MIMOSA chips Applications:, STAR-detector (RHIC Brookhaven), Eudet beam-telescope and ALICE inner tracker upgrade http://www.iphc.cnrs.fr/Monolithic-Active-Pixel-Sensors.html

41. TALENT Summer School, June 2013 MAPS http://www.iphc.cnrs.fr/Monolithic-Active-Pixel-Sensors.html Ultimate chip for STAR MIMOSA 26 for Eudet telescope Although based on simple MAPS principle – epi layer and NMOS electronics – MIMOSA chips use more complex pixel electronics Continuous reset and double correlated sampling

42. TALENT Summer School, June 2013 Charge collection & technology studies – simple demonstrators Production Real size prototype - yield studies Reticule 2x 2 cm 2006 Data compression - digitization Sara 2006Suze 2007 Final circuits – sub-blocs integration Mimosa22 2008 Pixel Array Discriminators Zero Suppression BiasReadout 2007 1999 MAPS

43. TALENT Summer School, June 2013 43 Advanced CMOS pixel sensors with intelligent pixels

44. TALENT Summer School, June 2013 44 Frame readout - Simple pixels - Signal and leakage current is collected - No time information is attached to hits - The whole frames are readout Small pixels Low power consumption Slow readout

45. TALENT Summer School, June 2013 45 Sparse readout 6 9 9 3 6 9 9 3 - Intelligent pixels - FPN is tuned inside pixels - Leakage current is compensated - Hit detection on pixel level - Time information is attached to hits  Larger pixels  Larger power consumption Fast (trigger based) readout

46. TALENT Summer School, June 2013 46 Intelligent pixel LatchComparatorCR-RC 4-bit tune DAC Readout bus CSA Bus driver RAM

47. TALENT Summer School, June 2013 CMOS electronics Two transistor types n-channel NMOS and p-channel PMOS are needed for the realization of complex circuits Silicon p type Silicon n type „Metal“ Electrode Insulator Silicon n type Silicon p type „Metal“ Electrode Insulator NMOSPMOS NMOS PMOS Free e- Holes

48. TALENT Summer School, June 2013 CMOS electronics Example: A good voltage amplifier can only be realized with CMOS Silicon p type Silicon n type „Metal“ Electrode Insulator Silicon n type Silicon p type „Metal“ Electrode Insulator NMOSPMOS NMOS PMOS Free e- Holes

49. TALENT Summer School, June 2013 MAPS structure with CMOS pixel electronics If PMOS transistors are introduced, signal loss can happen NMOS transistor in p-well N-well (collecting region) Pixel i P-type epi-layer P-type substrateEnergy (e-) MAPS with a PMOS transistor in pixel PMOS transistor in n-well Signal collection Signal loss

50. TALENT Summer School, June 2013 50 Advanced structures: INMAPS

51. TALENT Summer School, June 2013 51 INMAPS NMOS shielded by a deep p-well PMOS in a shallow p-well N-well (collecting region) Pixel P-doped epi layer INMPAS Deep P-layer is introduced to shield the PMOS transistors from epi layer No charge loss occurs This is not a CMOS standard process Only one producer so far: Tower Jazz

52. TALENT Summer School, June 2013 Overview INMAPS Tower Jazz process is gaining popularity in particle physics community It was originally developed by the foundry and the Detector Systems Centre, Rutherford Appleton Laboratory 2 Megapixels, large area sensor Designed for high-dynamic range X-ray imaging 40 µm pixel pitch 1350 x 1350 active pixels in focal plane Analogue readout Region-of-Reset setting 140 dB dynamic range 20 frames per second FORTIS chip http://dsc.stfc.ac.uk/Capabilities/CMOS+Sensors+Design/Follow +us/19816.aspx

53. TALENT Summer School, June 2013 Overview Detector Systems Centre, Rutherford Appleton Laboratory – some examples http://dsc.stfc.ac.uk/Capabilities/CMOS+Sensors+Design/Follow +us/19816.aspx Wafer scale 120 x 145 mm chip for medical imaging

54. TALENT Summer School, June 2013 54 Fast CMOS detectors based on drift charge collection: detectors in HVCMOS-processes and the CMOS processes with a high resistive wafer

55. TALENT Summer School, June 2013 55 Drift based detector: HVMAPS HVMAPS rely on the charge collection by drift Fast charge collection – high radiation tolerance The key is the use of a high voltage n-well in a relatively highly doped substrate Pixel electronics is embedded in the n-well Two concepts: High Ohmic Monolithic Pixels - LePIX – relies on a special CMOS process with high resistive substrate (CERN, Geneve) HVCMOS (or smart diode arrays - SDAs) – use a commercial HVCMOS process (CPPM, CERN, Bonn, LBNL, Geneve, Göttingen, Manchester and Heidelberg)

56. TALENT Summer School, June 2013 56 HVCMOS detectors (smart diode arrays)

57. TALENT Summer School, June 2013 57 P-Substrat Verarmungszone “Smart” Diode n-Wanne Pixel “Smart diode” Detector DriftPotentialenergie (e-) Smart diode array SDA

58. TALENT Summer School, June 2013 SDA Collected charge causes a voltage change in the n-well. This signal is sensed by the amplifier – placed in the n-well. PMOS N-well NMOS DS G holes electrons P-well P-substrate

59. TALENT Summer School, June 2013 SDA Collected charge causes a voltage change in the n-well. This signal is sensed by the amplifier – placed in the n-well. P-substrate

60. TALENT Summer School, June 2013 SDA P-substrate Collected charge causes a voltage change in the n-well. This signal is sensed by the amplifier – placed in the n-well.

61. TALENT Summer School, June 2013 61 Intelligent pixel ComparatorCR-RC CSA N-well AC coupling 3.3 V -50 V P-substrate

62. TALENT Summer School, June 2013 62 Intelligent pixel ComparatorCR-RC CSA N-well AC coupling 3.3 V -50 V P-substrate

63. TALENT Summer School, June 2013 63 Intelligent pixel ComparatorCR-RC CSA N-well AC coupling 3.3 V -50 V P-substrate

64. TALENT Summer School, June 2013 64 Intelligent pixel Comparator CR-RC CSA N-well AC coupling 3.3 V -50 V P-substrate

65. TALENT Summer School, June 2013 65 Intelligent pixel Comparator CR-RC CSA N-well AC coupling 3.3 V -50 V P-substrate

66. TALENT Summer School, June 2013 66 Intelligent pixel Comparator CR-RC CSA N-well AC coupling 3.3 V -50 V P-substrate

67. TALENT Summer School, June 2013 67 Intelligent pixel Comparator CR-RC CSA N-well AC coupling 3.3 V -50 V P-substrate

68. TALENT Summer School, June 2013 3D layout of a “smart diode” 40 µm 3D layout generated by GDS2POV software

69. TALENT Summer School, June 2013 Applications Mu3e experiment at PSI and ATLAS upgrade option 5 mm 69 Mu3e prototype chip 4.4mm ATLAS prototype chip

70. TALENT Summer School, June 2013 70 TWELL - MAPS

71. TALENT Summer School, June 2013 71 TWELL MAPS Triple-well MAPS Deep n-well2. n-well P-well NMOSPMOS Pixel Epi-layer Diffusion Energy (e-) Signal lossSignal collection Collection electrode is a deep n-well To avoid crosstalk, secondary n-well is used for digital electronics Rely on diffusion, implemented in low voltage CMOS processes Collaboration: INFN Pisa, Pavia, Trieste, Padova, Torino, Bologna

72. TALENT Summer School, June 2013 72 TWELL MAPS APSEL Chips for B-factories The APSEL4D MAPS chip bonded to the chip carrier. Schematic drawing of the full Layer0 made of 8 pixel modules mounted around the beam pipe with a pinwheel arrangement. “Thin pixel development for the SuperB silicon vertex tracker”, NIMA vol. 650, 2011

73. TALENT Summer School, June 2013 73 Special monolithic technologies

74. TALENT Summer School, June 2013 74 SOI

75. TALENT Summer School, June 2013 75 SOI technology An SOI detector consists of a typically micrometer-thick electronics layer, an insulation silicon-dioxide layer (called buried oxide) and a high resistance substrate. (In our case ~500  m thick, 7.1k  cm, n-type FZ substrate.) The sensor has the form of a matrix of pn junctions, the collecting regions are p- type diffusion implants in the n-substrate. A connection through the buried oxide is made to connect the readout electronics with electrodes The industrial SOI detector technology based on Lapis semiconductor (formerly OKI) 200nm (or 150nm) CMOS fully depleted process has been developed within a collaboration between industry and institutes Hi res. N-type substrate Electronics layer Buried oxide Connection Energy (h+) CMOS pixel electronics P+ collecting electrode Originally developed at University of Krakow The development continued in collaboration with industry (OKI and Lapis) The collaboration is now led by KEK, Japan

76. TALENT Summer School, June 2013 MPW (Multi Project Wafer) run ~Twice per Year 76 Multi project runs organized by KEK

77. TALENT Summer School, June 2013 77 SOI technology SOI technology can be used for x-ray detection thanks to its thick sensitive region Example of an x-ray detector: INTPIX4 15.4 mm 10.2 mm

78. TALENT Summer School, June 2013 78 DEPFET

79. TALENT Summer School, June 2013 79 DEPFET Pixel PMOSExt. gate Int. gate Clear Signal collection Signal clearing N-substrate (depleted) P-type backside contact Potential en. (e-) Elect. Interact. Int. gate DEPFET is a special MOS-based monolithic detector produced at Semiconductor Laboratory (MPI) Munich

80. TALENT Summer School, June 2013 80 DEPFET Pixel PMOSExt. gate Int. gate Clear Signal collection Signal clearing N-substrate (depleted) P-type backside contact Potential en. (e-) Elect. Interact. Int. gate DEPFET uses high resistive substrate with depleted layers up to 600 um – very high signal to noise ratio

81. TALENT Summer School, June 2013 81 DEPFET Pixel PMOSExt. gate Int. gate Clear Signal collection Signal clearing N-substrate (depleted) P-type backside contact Potential en. (e-) Elect. Interact. Int. gate DEPFET structure is very innovative – the signals are collected in internal gates Strong points: small “capacitance” of internal gate – high signal amplification Absence of reset noise, special thinning technique assures mechanical stability of the thin detectors

82. TALENT Summer School, June 2013 82 DEPFET Application in high energy physics: Belle II pixel detector at KEK 10 cm long detector modules fixed at the edges without any other supporting structure

83. TALENT Summer School, June 2013 83 DEPFET Only silicon modules

84. TALENT Summer School, June 2013 84 DEPFET Since pixel electronics is very simple (only one transistor) and no periphery circuits can be realized at the detector substrate, external ASICs needed for the readout Semi-Monolithic concept

85. TALENT Summer School, June 2013 85 Thank you!