Presentation is loading. Please wait.

Presentation is loading. Please wait.

© March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 1 Rochester Institute of Technology Microelectronic Engineering ROCHESTER.

Published byDiana Allen Modified over 8 years ago

Similar presentations

Presentation on theme: "© March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 1 Rochester Institute of Technology Microelectronic Engineering ROCHESTER."— Presentation transcript:

1

2 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 1 Rochester Institute of Technology Microelectronic Engineering ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Gig Ohm Resistor Process Details  Dr. Lynn Fuller/Paul John  Webpage: http://people.rit.edu/lffeeehttp://people.rit.edu/lffeee  Microelectronic Engineering  Rochester Institute of Technology  82 Lomb Memorial Drive  Rochester, NY 14623-5604  Tel (585) 475-2035  Fax (585) 475-5041  Email: Lynn.Fuller@rit.eduLynn.Fuller@rit.edu  MicroE Webpage: http://www.microe.rit.eduhttp://www.microe.rit.edu 3-24-2008 GigOhmResistors.ppt

3 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 2 Rochester Institute of Technology Microelectronic Engineering INTRODUCTION This project is to design and make Gig Ohm Resistors. The process will use ion implanted (Boron) poly silicon resistors. The design is for discrete devices of size suitable for automated pick and place surface mounting for printed circuit board assembly. The individual resistors are 2mm x 3mm and eight different designs are arranged in an array which will be cut into individual chips at the end of the process. The first run will use aluminum metal. Future runs will use a metal stack of aluminum, chrome, nickel, and solder. Applications for resistors of this high value are MOSFET biasing of high input impedance amplifiers, charge sensors for piezoelectric (quartz) pressure sensors, and more. In these applications the exact value is not usually important.

4 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 3 Rochester Institute of Technology Microelectronic Engineering LAYOUT

5 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 4 Rochester Institute of Technology Microelectronic Engineering ALIGNMENT KEY LOCATIONS, CHIP SIZE, ETC. Lower Left Corner =(0,0) Upper Right Corner = (9400,6400) Step Size in X = 9.6 mm Step Size in Y = 6.6 mm Center of Die = (4700, 3200) Location of PA alignment Mark = Center of Die = (4700,3200) B scope (Y-Direction) Fine Alignment 20P4F Island Center = 4955,3680 B scope (Y-Direction) Fine Alignment 20P4F Window Center = 4955,3500 C scope (X-Direction) Fine Alignment 20P4F Island Center = 4550,3700 C scope (X-Direction) Fine Alignment 20P4F Window Center = 4350,3699

6 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 5 Rochester Institute of Technology Microelectronic Engineering PROCESS STEPS Gig Ohm Resistor process 1. ID01 scribe 2. CL01RCA clean 3. OX05--- 30,000 wet oxide 4. CV01 deposit poly 5. IM01 – Ion Implant poly Si 6. PH03 – 1 – poly 7. ET08 poly etch 8. ET07 strip resist 9. CL01 RCA clean 10. OX08 – poly reox 11. CV03 – LTO 12. OX08 DS anneal 13. PH03 – 2 CC 14. ET10 etch CC 15. ET07 strip resist 16. CL01 RCA Clean, modified 17. ME01 Deposit Metal 18. PH03 -3- metal 19. ET05 etch metal 20. ET07 strip resist 21. SI01 SINTER 22. TE01 Test 1 23. SA01 Saw Wafer

7 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 6 Rochester Institute of Technology Microelectronic Engineering STARTING WAFER P-TYPE, 35 OHM-CM For this project the starting silicon wafer type and resistivity is not that important because the resistors will be made of poly silicon on an insulating oxide layer. The starting wafer is only a substrate for the thin films on its surface.

8 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 7 Rochester Institute of Technology Microelectronic Engineering ID01 - IDENTIFY WAFER (SCRIBE WAFER) Paul John D1

9 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 8 Rochester Institute of Technology Microelectronic Engineering RCA CLEAN DI water rinse, 5 min. H 2 0 - 50 HF - 1 60 sec. HPM H 2 O–4500ml HCL-300ml H 2 O 2 – 900ml 75 °C, 10 min. SPIN/RINSE DRY APM H 2 O – 4500ml NH 4 OH–300ml H 2 O 2 – 900ml 75 °C, 10 min. DI water rinse, 5 min. DI water rinse, 5 min. PLAY ANSWER What does RCA stand for?

10 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 9 Rochester Institute of Technology Microelectronic Engineering RCA CLEAN RCA Bench Spin/Rinse/Dry Tool

11 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 10 Rochester Institute of Technology Microelectronic Engineering GROW 30,000 Å OXIDE 30,000 Å SiO2 Push at 800 C in N2 Ramp to 1100 C in dry O2 Time = ~900 min. in wet O2 Ramp down to 800 C in N2 Pull at 800 C in N2 Use Recipe 430 – Tube 1

12 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 11 Rochester Institute of Technology Microelectronic Engineering WET OXIDE GROWTH CHART Steam 900C 1300C 0.01 0.1 1 10 1 100 1000 Time in minutes Oxide Thickness in microns

13 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 12 Rochester Institute of Technology Microelectronic Engineering BRUCE FURNACE RECIPE 430 – WET OXIDE 30,000Å 1100°C 800 °C Boat Out Boat InBoat Out Load Push StabilizeRamp-UpSoak AnnealRamp-Down Pull Recipe #430 800 °C 25 °C Any 0 lpm none 800 °C At the end of a run the furnace returns to Interval 0 which is set for boat out, 25 °C and no gas flow. The furnace waits in that state until someone aborts the current recipe or loads a new recipe. Wet Oxide Growth, Target 30,000 Å Interval 0 Interval 1 Interval 2 Interval 3 Interval 4 Interval 5Interval 6 Interval 7Interval 8 12 min15 min 30 min5 min 15 hrs5 min 60 min12 min 10 lpm10 lpm 5 lpm5 lpm 10 lpm15 lpm 10 lpm15 lpm N2N2 N2O2O2/H2N2 N2N2

14 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 13 Rochester Institute of Technology Microelectronic Engineering 30,000 Å OXIDE GROWTH Polysilicon, 3500A 30,000 Å SiO2

15 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 14 Rochester Institute of Technology Microelectronic Engineering OXIDE COLOR VERSUS THICKNESS TABLE SiO 2 Yes! No! Silicon To observe a valid color, the wafer must be observed perpendicular to the surface under white (all wavelengths) light or the optical path length will be different, hence the color will change with the angle.

16 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 15 Rochester Institute of Technology Microelectronic Engineering TENCORE SPECTRAMAP Measure Oxide Thickness

17 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 16 Rochester Institute of Technology Microelectronic Engineering REFLECTANCE SPECTROMETER NANOSPEC FILM THICKNESS MEASUREMENT INCIDENT WHITE LIGHT, THE INTENSITY OF THE REFLECTED LIGHT IS MEASURED VS WAVELENGTH WHITE LIGHT SOURCE OPTICS WAFER MONOCHROMATOR & DETECTOR 3000 Å OXIDE 7000 Å OXIDE Oxide on Silicon400-30,000 Å Nitride400-30,000 Neg Resist500-40,000 Poly on 300-1200 Ox400-10,000 Neg Resist on Ox 300-350300-3500 Nitride on Oxide 300-3500300-3500 Thin Oxide100-500 Thin Nitride100-500 Polyimide500-10,000 Positive Resist500-40,000 Pos Resist on Ox 500-15,0004,000-30,000

18 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 17 Rochester Institute of Technology Microelectronic Engineering STEP ETCH APPARATUS BUFFERED HF Lower 1/4 inch every 45 seconds

19 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 18 Rochester Institute of Technology Microelectronic Engineering ETCH STEPS IN OXIDE ON C1 5000 Å BARE SILICON

20 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 19 Rochester Institute of Technology Microelectronic Engineering DEPOSIT LPCVD POLY SILICON Polysilicon, 3500A LPCVD, 610C, ~45min 30,000 Å SiO2

21 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 20 Rochester Institute of Technology Microelectronic Engineering DOPE POLY SILICON BY ION IMPLANT Polysilicon, 3500A 30,000 Å SiO2 50kEV, Boron, B11 from BF3 gas Dose ~1e12 Wafer 1 Dose = Wafer 2 Dose = Wafer 3 Dose = Wafer 4 Dose =

22 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 21 Rochester Institute of Technology Microelectronic Engineering VARIAN 350 D ION IMPLANTER (4” AND 6” WAFERS)

23 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 22 Rochester Institute of Technology Microelectronic Engineering B 11 IMPLANT FOR BORON THRESHOLD ADJUSTS, STOP, P-WELL I µA 50 40 30 10 20 ION MASS (AMU) 30191110 4948 B10 B11 BF2 BF+ USE THIS PEAK PLAY

24 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 23 Rochester Institute of Technology Microelectronic Engineering PHOTO 1 RESISTOR Polysilicon, 3500A 30,000 Å SiO2 Coat with ~1.0µm Photoresist

25 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 24 Rochester Institute of Technology Microelectronic Engineering COAT PHOTORESIST ON SSI TRACK COAT.RCP

26 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 25 Rochester Institute of Technology Microelectronic Engineering EXPOSE RESIST ON CANON STEPPER i-Line Stepper = 365 nm NA = 0.52,  = 0.6 Resolution = 0.7 / NA = ~0.5 µm 20 x 20 mm Field Size Depth of Focus = k 2 /(NA) 2 = 0.8 µm

27 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 26 Rochester Institute of Technology Microelectronic Engineering DEVELOP RESIST ON SSI TRACK Polysilicon, 3500A 30,000 Å SiO2

28 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 27 Rochester Institute of Technology Microelectronic Engineering ETCH POLY SILICON ON LAM 490 Polysilicon, 3500A 30,000 Å SiO2 Use Lam 490 Recipe FACPOLY SF6 140 sccm O2 40 sccm Gap 1.5 cm Power 140 watts 325 mTorr 150 Sec/wafer

29 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 28 Rochester Institute of Technology Microelectronic Engineering STRIP PHOTORESIST ON BRANSON ASHER Polysilicon, 3500A 30,000 Å SiO2

30 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 29 Rochester Institute of Technology Microelectronic Engineering RCA CLEAN DI water rinse, 5 min. H 2 0 - 50 HF - 1 60 sec. HPM H 2 O–4500ml HCL-300ml H 2 O 2 – 900ml 75 °C, 10 min. SPIN/RINSE DRY APM H 2 O – 4500ml NH 4 OH–300ml H 2 O 2 – 900ml 75 °C, 10 min. DI water rinse, 5 min. DI water rinse, 5 min. PLAY ANSWER What does RCA stand for?

31 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 30 Rochester Institute of Technology Microelectronic Engineering OXIDE REGROWTH Polysilicon, 3500A 30,000 Å SiO2 500A recipe 250

32 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 31 Rochester Institute of Technology Microelectronic Engineering LPCVD LTO Polysilicon, 3500A 30,000 Å SiO2 4000A LTO Or 4000A TEOS + Densify

33 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 32 Rochester Institute of Technology Microelectronic Engineering PHOTO – 2 CONTACT CUTS Polysilicon, 3500A 30,000 Å SiO2

34 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 33 Rochester Institute of Technology Microelectronic Engineering EXPOSE i-Line Stepper = 365 nm NA = 0.52,  = 0.6 Resolution = 0.7 / NA = ~0.5 µm 20 x 20 mm Field Size Depth of Focus = k 2 /(NA) 2 = 0.8 µm

35 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 34 Rochester Institute of Technology Microelectronic Engineering ETCH CONTACT CUTS Polysilicon, 3500A 30,000 Å SiO2

36 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 35 Rochester Institute of Technology Microelectronic Engineering STRIP RESIST Branson Asher

37 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 36 Rochester Institute of Technology Microelectronic Engineering MODIFIED RCA CLEAN DI water rinse, 5 min. H 2 0 - 50 HF - 1 60 sec. HPM H 2 O–4500ml HCL-300ml H 2 O 2 – 900ml 75 °C, 10 min. H20 - 50 HF - 1 60 sec APM H 2 O – 4500ml NH 4 OH–300ml H 2 O 2 – 900ml 75 °C, 10 min. DI water rinse, 5 min. DI water rinse, 5 min. DI water rinse, 5 min. SPIN/RINSE DRY

38 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 37 Rochester Institute of Technology Microelectronic Engineering DEPOSIT METAL CVC 601 Sputter Tool

39 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 38 Rochester Institute of Technology Microelectronic Engineering PHOTO - 3 - METAL

40 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 39 Rochester Institute of Technology Microelectronic Engineering SSI COAT AND DEVELOP TRACK FOR 6” WAFERS SSI coat and develop track

41 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 40 Rochester Institute of Technology Microelectronic Engineering ASML 5500/200 NA = 0.48 to 0.60 variable  = 0.35 to 0.85 variable With Variable Kohler, or Variable Annular illumination Resolution = K1 /NA = ~ 0.35µm for NA=0.6,  =0.85 Depth of Focus = k 2 /(NA) 2 = > 1.0 µm for NA = 0.6 i-Line Stepper = 365 nm 22 x 27 mm Field Size

42 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 41 Rochester Institute of Technology Microelectronic Engineering ETCH METAL Wet Etch

43 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 42 Rochester Institute of Technology Microelectronic Engineering STRIP RESIST Branson Asher

44 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 43 Rochester Institute of Technology Microelectronic Engineering SINTER Native Oxide Before Sinter After Sinter Reduce Surface States Reduce Contact Resistance Oxygen Hydrogen, neutral region Silicon Crystal + charge region Silicon DiOxide Interface silicon atom that lost an electron

45 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 44 Rochester Institute of Technology Microelectronic Engineering PICTURES

46 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 45 Rochester Institute of Technology Microelectronic Engineering TEST R = 1/slope = 106 Gigohms Rhos = 106 50/1800 = 2.94 Gigohms/square

47 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 46 Rochester Institute of Technology Microelectronic Engineering TEST R=1/slope; Rhos=R / #sqs; Rho=Rhos x thickness (3500Å); Dose=implanter setting R wafer 4 = 106 G ; Rhos = 2.94 Gohm/sq; Rho = 103K ohm-cm; Dose=1E12 cm-2 R wafer 3 = 339 G ; Rhos = 9.42 Gohm/sq; Rho = 330K ohm-cm; Dose = ? R wafer 2 = 943 G ; Rhos = 26.2 Gohm/sq; Rho = 917K ohm-cm; Dose = ? R wafer 1 = 1104 G; Rhos = 30.7 Gohm/sq; Rho = 1075K ohm-cm; Dose = ?

48 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 47 Rochester Institute of Technology Microelectronic Engineering SAW WAFER

49 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 48 Rochester Institute of Technology Microelectronic Engineering SUMMARY A process has been created.

50 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 49 Rochester Institute of Technology Microelectronic Engineering REFERENCES 1.Silicon Processing for the VLSI Era, Volume 1 – Process Technology, 2 nd, S. Wolf and R.N. Tauber, Lattice Press. 2.The Science and Engineering of Microelectronic Fabrication, Stephen A. Campbell, Oxford University Press, 1996.

51 © March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 50 Rochester Institute of Technology Microelectronic Engineering HOMEWORK – GIG OHM RESISTORS

Download ppt "© March 24, 2008, Dr. Lynn Fuller Gig Ohm Resistors Fabrication Process Page 1 Rochester Institute of Technology Microelectronic Engineering ROCHESTER."

Similar presentations

FABRICATION PROCESSES

FABRICATION PROCESSES
CMOS Process at a Glance

CMOS Process at a Glance
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING

ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING
Creating Snow flake structures using EBL Date:January 2011 by:Lejmarc Snowball Principle Investigator:Dr. William Knowlton for:Nanoscale Materials and.

Creating Snow flake structures using EBL Date:January 2011 by:Lejmarc Snowball Principle Investigator:Dr. William Knowlton for:Nanoscale Materials and.
INTEGRATED CIRCUITS Dr. Esam Yosry Lec. #6.

INTEGRATED CIRCUITS Dr. Esam Yosry Lec. #6.
1 Microelectronics Processing Course - J. Salzman - Jan. 2002 Microelectronics Processing Oxidation.

1 Microelectronics Processing Course - J. Salzman - Jan Microelectronics Processing Oxidation.
Photolithography Photolithography is the transfer of patterns, circuits, device structures, etc. to a substrate or wafer using light and a mask.

Photolithography Photolithography is the transfer of patterns, circuits, device structures, etc. to a substrate or wafer using light and a mask.
Fabrication of p-n junction in Si Silicon wafer [1-0-0] Type: N Dopant: P Resistivity: 10-20 Ω-cm Thickness: 505-545 µm.

Fabrication of p-n junction in Si Silicon wafer [1-0-0] Type: N Dopant: P Resistivity: Ω-cm Thickness: µm.
Introduction to CMOS VLSI Design Lecture 0: Introduction

Introduction to CMOS VLSI Design Lecture 0: Introduction
1 Kimberly Manser 5.14.2008 Process Development for Double-Sided Fabrication of a Photodiode Process Development of a Double-Sided Photodiode (for application.

1 Kimberly Manser Process Development for Double-Sided Fabrication of a Photodiode Process Development of a Double-Sided Photodiode (for application.
Design and Implementation of VLSI Systems (EN1600) lecture04 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Sedra/Prentice.

Design and Implementation of VLSI Systems (EN1600) lecture04 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Sedra/Prentice.
The Physical Structure (NMOS)

The Physical Structure (NMOS)
Design and Implementation of VLSI Systems (EN0160) Sherief Reda Division of Engineering, Brown University Spring 2007 [sources: Sedra/Prentice Hall, Saint/McGrawHill,

Design and Implementation of VLSI Systems (EN0160) Sherief Reda Division of Engineering, Brown University Spring 2007 [sources: Sedra/Prentice Hall, Saint/McGrawHill,
Sample Devices for NAIL Thermal Imaging and Nanowire Projects Design and Fabrication Mead Mišić Selim Ünlü.

Sample Devices for NAIL Thermal Imaging and Nanowire Projects Design and Fabrication Mead Mišić Selim Ünlü.
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING

ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING
Device Fabrication Example

Device Fabrication Example
Introduction Integrated circuits: many transistors on one chip.

Introduction Integrated circuits: many transistors on one chip.
EE141 © Digital Integrated Circuits 2nd Manufacturing 1 Manufacturing Process I Dr. Shiyan Hu Office: EERC 518 Adapted and modified from Digital Integrated.

EE141 © Digital Integrated Circuits 2nd Manufacturing 1 Manufacturing Process I Dr. Shiyan Hu Office: EERC 518 Adapted and modified from Digital Integrated.
CMOS Process Integration ECE/ChE 4752: Microelectronics Processing Laboratory Gary S. May March 25, 2004.

CMOS Process Integration ECE/ChE 4752: Microelectronics Processing Laboratory Gary S. May March 25, 2004.
Rochester Institute of Technology - MicroE © REP/LFF 8/17/2015 Metal Gate PMOS Process EMCR201 PMOS page-1  10 Micrometer Design Rules  4 Design Layers.

Rochester Institute of Technology - MicroE © REP/LFF 8/17/2015 Metal Gate PMOS Process EMCR201 PMOS page-1  10 Micrometer Design Rules  4 Design Layers.

Similar presentations

Ads by Google