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Reliability Analysis of Flexible Electronics: Case Study of Hydrogenated Amorphous Silicon (a-Si:H) TFT Scan Driver Tsung-Ching (Jim) Huang Tim Cheng Feb.

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Presentation on theme: "Reliability Analysis of Flexible Electronics: Case Study of Hydrogenated Amorphous Silicon (a-Si:H) TFT Scan Driver Tsung-Ching (Jim) Huang Tim Cheng Feb."— Presentation transcript:

1 Reliability Analysis of Flexible Electronics: Case Study of Hydrogenated Amorphous Silicon (a-Si:H) TFT Scan Driver Tsung-Ching (Jim) Huang Tim Cheng Feb. 10th 2007

2 2 Outline Introduction Motivation: Why a-Si:H TFT scan driver Reliability of a-Si:H TFT circuits  Electrical degradation and self-recovery Reliability Analysis for Flexible Electronics Device degradation model Reliability simulation Conclusion

3 3 Why A-Si:H TFT Scan Driver Type of TFTSingle-CrystalPoly- SiA-Si:HOrganic Proc. Temp.1000 ºC450 ºC200 ºC< 100 ºC Mobility270 cm 2 /Vs250 cm 2 /Vs1 cm 2 /Vs0.5 cm 2 /Vs Cost/AreaHigh MediumLow MaturityHighMediumHighLow Flex. Sub.Transfer Direct Degrade.N/AElectrical Elec./Chem. Samsung Gen VII display line will produce an area of active electronics equal to ~ 10% of total worldwide IC area per year 60,000 1870 mm X 2200 mm panel/month Scan driver is used to generate scanning signal to drive TFTs Ref: Samsung; T.N. Jackson, Penn State Univ.

4 4 Reliability Concern of A-Si:H TFT Ref: C.-S. Chiang et al, Jap. J. Applied Physics, 1998; AUO Taiwan Prolonged bias-stress to a-Si:H TFTs will induce electrical degradation which causes threshold voltage (V TH ) shift Electrical degradation is attributed to bias- induced dangling bonds Charge trapping in the SiNx layer and point defect creation in the a-Si:H layer are the major mechanisms

5 5 Outline Introduction Motivation: Why a-Si:H TFT scan driver Reliability of a-Si:H TFT circuits  Electrical degradation and self-recovery Reliability Analysis for Flexible Electronics Device degradation model Reliability simulation Conclusion

6 6 Electrical Degradation Model V TH degradation Pulsed-bias V GS DC-bias V GS Pulsed-bias V GS + pulsed-biased V DS V TH recovery Reverse pulsed-bias V GS

7 7 Methodology for Reliability Simulation SPICE-level circuit simulation High accuracy Compatible with RPI TFT- model Compatible with Verilog-a behavioral model Comprehensive model parameters Iterative reliability simulation Incrementally change model parameters to mimic physical degradation process High-accuracy with measured device degradation model parameters under various conditions Simulation time reduction Auto-regressive invariant moving average (ARIMA) model

8 8 Case Study: A-Si:H TFT Scan Driver A-Si:H TFT scan driver integrated with the LCD pixel circuits on the glass substrate Save the cost of wire bonding and packaging Eliminate the need for driver ICs Compatible with low-temperature process for plastic substrates Device degradation depends on its bias-stress Degradation profile for each TFT can be obtained by analyzing its bias-stress Reliability simulation can predict circuit lifetime based on bias-stress analysis

9 9 Comparison of Simulation and Measurement Results Fig. 1. Before DegradationFig. 2 After Degradation (33,000s, 85 ºC) Reliability simulation tool provides a fast and yet accurate way of estimating circuit reliability with a-Si:H TFTs No physical layout information is required SPICE-compatible Device degradation model and input pattern are needed Simulation Measured

10 10 Conclusion Flexible electronics are emerging Future trend in consumer electronics Potential applications includes:  E-paper, flexible display  RFID tags, Implantable IDtags  Ubiquitous sensor arrays & rollable solar cells Reliability analysis is essential Electrical degradation is severe vs. CMOS Robust circuit design and architecture is critical Our reliability simulation tool shows: Predicting circuit reliability is possible with high accuracy within reasonable simulation time

11 11 Q & A Thank you for your attention !!


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