# COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji.

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COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji

Review This Class Conditional Instructions Procedure Quiz 3

Instructions for Making Decisions High-level programming language C/C++: if … else … (conditional) goto(unconditional) for, while, until (loops) Assembly Languages MIPS: beq (branch if equal) bne (branch if not equal) j(unconditional jump)

Conditional Operations Branch to a labeled instruction if a condition is true Otherwise, continue sequentially beq rs, rt, L1 if (rs == rt) branch to instruction labeled L1; bne rs, rt, L1 if (rs != rt) branch to instruction labeled L1; j L1 unconditional jump to instruction labeled L1

Compiling If Statements C code: if (i==j) f = g+h; else f = g-h;

Compiling If Statements C code: if (i==j) f = g+h; else f = g-h; f (\$s0), g (\$s1), h(\$s2), i(\$s3), j(\$s4) Compiled MIPS code: bne \$s3, \$s4, Else add \$s0, \$s1, \$s2 j Exit Else: sub \$s0, \$s1, \$s2 Exit: … Assembler calculates addresses

Compiling Loop Statements C code: while (save[i] == k) i = i+1; i in \$s3, k in \$s5, address of save in \$s6 Flowchart?

Compiling Loop Statements C code: while (save[i] == k) i = i+1; i in \$s3, k in \$s5, address of save in \$s6 Compiled MIPS code: Loop: sll \$t1, \$s3, 2 add \$t1, \$t1, \$s6 lw \$t0, 0(\$t1) bne \$t0, \$s5, Exit addi \$s3, \$s3, 1 j Loop Exit: …

Basic Blocks A basic block is a sequence of instructions with No embedded branches (except at end) No branch targets (except at beginning) A compiler identifies basic blocks for optimization An advanced processor can accelerate execution of basic blocks

More Conditional Operations Less than Greater than Combination of logical operations

More Conditional Operations Set result to 1 if a condition is true Otherwise, set to 0 slt rd, rs, rt if (rs < rt) rd = 1; else rd = 0; slti rt, rs, constant if (rs < constant) rt = 1; else rt = 0; Use in combination with beq, bne slt \$t0, \$s1, \$s2 # if (\$s1 < \$s2) bne \$t0, \$zero, L # branch to L

Exercise Convert the following C++ statement into MIPS if (i>j && i<k) { a++; } Assume i in \$s0, j in \$s1, k in \$s2, a in \$s3

Exercise if (i>j && i<k) { a++; } Assume i in \$s0, j in \$s1, k in \$s2, a in \$s3 slt \$t0, \$s1, \$s0 slt \$t1, \$s0, \$s2 and \$t0, \$t0, \$t1 beq \$t0, \$zero, L addi \$s3, \$s3, 1 L: …

Better Solution if (i>j && i<k) { a++; } Assume i in \$s0, j in \$s1, k in \$s2, a in \$s3 slt \$t0, \$s1, \$s0 beq \$t0, \$zero, L slt \$t0, \$s0, \$s2 beq \$t0, \$zero, L addi \$s3, \$s3, 1 L: …

Branch Instruction Design Why not blt, bge, etc? Hardware for <, ≥, … slower than =, ≠ Combining with branch involves more work per instruction, requiring a slower clock All instructions penalized! beq and bne are the common case This is a good design compromise

Signed vs. Unsigned Signed comparison: slt, slti Unsigned comparison: sltu, sltui Example \$s0 = 1111 1111 1111 1111 1111 1111 1111 1111 \$s1 = 0000 0000 0000 0000 0000 0000 0000 0001 slt \$t0, \$s0, \$s1 # signed –1 < +1  \$t0 = 1 sltu \$t0, \$s0, \$s1 # unsigned +4,294,967,295 > +1  \$t0 = 0

Branch Addressing Branch instructions specify Opcode, two registers, target address oprsrtconstant or address 6 bits5 bits 16 bits

Branch Addressing Branch instructions specify Opcode, two registers, target address Addresses of the program have to fit in the 16- bit field. Directly using branch address Problem: Is far too small to be a realistic. oprsrtconstant or address 6 bits5 bits 16 bits

Branch Addressing Branch instructions specify Opcode, two registers, target address Addresses of the program have to fit in the 16- bit field. Directly using branch address Problem: Is far too small to be a realistic. Solution: use a register and branch address oprsrtconstant or address 6 bits5 bits 16 bits

Program Counter (PC)

PC-relative addressing In PC-relative addressing Because it is convenient for the hardware to increment the PC early to point to the next instruction, (which will be discussed in Chapter 4) The MIPS address is actually relative to the address of the following instruction (PC+4) instead of the current instruction (PC)

Branch Addressing Branch instructions specify Opcode, two registers, target address Most branch targets are near branch Forward or backward oprsrtconstant or address 6 bits5 bits 16 bits PC-relative addressing Target address = PC + offset × 4 PC already incremented by 4 by this time

Jump Addressing Branch instructions target are near branch Jump instructions Invoke procedure that may not be near the call With long addresses in the format Use other forms of addressing

Jump Addressing Jump ( j and jal ) targets could be anywhere in text segment Encode full address in instruction (Pseudo)Direct jump addressing Target address = PC 31…28 : (address × 4) opaddress 6 bits 26 bits

Jump Addressing Jump ( j and jal ) targets could be anywhere in text segment Encode full address in instruction (Pseudo)Direct jump addressing Target address = PC 31…28 : (address × 4) opaddress 6 bits 26 bits Replaces only the lower 28 bits of the PC, leaving the upper 4 bits of the PC unchanged.

Target Addressing Example Loop code from earlier example Assume Loop starting at location 80000 in memory. Loop: sll \$t1, \$s3, 2 800000019920 add \$t1, \$t1, \$s6 8000409229032 lw \$t0, 0(\$t1) 8000835980 bne \$t0, \$s5, Exit 8001258212 addi \$s3, \$s3, 1 80016819 1 j Loop 80020220000 Exit: … 80024

Branching Far Away If branch target is too far to encode with 16-bit offset, assembler rewrites the code Example beq \$s0,\$s1, L1 ↓ bne \$s0,\$s1, L2 j L1 L2:… Replace the short-address condition branch

Time for a Break (10 mins)

Review Last Session Procedure Call Steps of procedure call caller and callee Branch Addressing This Session Leaf procedure Next Session Non-leaf procedure Quiz

Procedure Procedure (function) A stored subroutine that performs a specific task based on the parameters with which it is provided Important when writing a large program Make code easier to understand Allow code to be reused Allow a programmer to focus on a specific task

Procedure Parameters of procedure Act as an interface between the procedure and the rest of the program and data Pass values Return results

Procedure Calling The exaction of a procedure, the program requires the following steps: 1.Place parameters in registers 2.Transfer control to procedure 3.Acquire storage for procedure 4.Perform procedure’s operations 5.Place result in register for caller 6.Return to place of call

Caller and Callee Caller The program that instigates a procedure and provides the necessary parameter values Callee A procedure that executes a series of stored instructions based on parameters provided by the caller and then returns control to the caller

Register Usage Registers are the fastest place to hold data in computer, \$a0 – \$a3: arguments (reg’s 4 – 7) \$v0, \$v1: result values (reg’s 2 and 3) \$t0 – \$t9: temporaries Can be overwritten by callee \$s0 – \$s7: saved Must be saved/restored by callee \$gp: global pointer for static data (reg 28) \$sp: stack pointer (reg 29) \$fp: frame pointer (reg 30) \$ra: return address (reg 31)

Procedure Call Instructions Procedure call: jump and link jal ProcedureLabel Address of following instruction put in \$ra Jumps to target address Procedure return: jump register jr \$ra Jump to the address specified in the register \$ra ( Copies \$ra to program counter )

Using More Registers Four arguments and two return value registers: \$a0 – \$a3: arguments (reg’s 4 – 7) \$v0, \$v1: result values (reg’s 2 and 3) If compiler needs more registers, Spill registers The process of putting less commonly used variables (or those needed later) into memory.

Using More Registers Stack A last-in-first-out queue for spilling registers Stack pointer \$sp (register 29) Point to the address of the most recent element in the stack Push Add element onto the stack Pop Remove element from the stack

Stack By historical precedent, stack “grows” from higher addresses to lower addresses. Push Add element onto the stack By subtracting from the stack pointer addi \$sp, \$sp, -12 Pop Remove element from the stack By adding to the stack pointer addi \$sp, \$sp, 12

Leaf Procedure and non-Leaf Procedure Leaf Procedure Procedures that do not call other procedures Non-leaf Procedure Procedures that call other procedures

Leaf Procedure Example C code: int leaf_example (int g, int h, int i, int j) { int f; f = (g + h) - (i + j); return f; } Arguments g, …, j in \$a0, …, \$a3 f in \$s0 (hence, need to save \$s0 on stack) Result in \$v0

Leaf Procedure Example MIPS code: (leaf example) addi \$sp, \$sp, -12 sw \$t1, 8(\$sp) sw \$t0, 4(\$sp) sw \$s0, 0(\$sp) add \$t0, \$a0, \$a1 add \$t1, \$a2, \$a3 sub \$s0, \$t0, \$t1 add \$v0, \$s0, \$zero lw \$s0, 0(\$sp) lw \$t0, 4(\$sp) lw \$t1, 8(\$sp) addi \$sp, \$sp, 12 jr \$ra Save \$s0, \$t1, \$t0 on stack Procedure body Restore \$s0, \$t1, \$t0 from the stack Result Return

Status of Stack

Temporary Registers MIPS Assumption \$t0 – \$t9: temporary registers that are not preserved by the callee on a procedure call \$s0 – \$s7: saved registers Must be preserved by callee on a procedure call If used, the callees saves and restores them

Simplified Leaf Procedure Example MIPS code: (leaf example) addi \$sp, \$sp, -4 sw \$s0, 0(\$sp) add \$t0, \$a0, \$a1 add \$t1, \$a2, \$a3 sub \$s0, \$t0, \$t1 add \$v0, \$s0, \$zero lw \$s0, 0(\$sp) addi \$sp, \$sp, 4 jr \$ra Save \$s0 on stack Procedure body Restore \$s0 from the stack Result Return

Time for a Break (10 mins)

Review Last Session Registers used Stack jal and jr leaf and no-leaf procedure Allocating space for new data on the heap This Session Non-leaf Procedure Quiz

Non-Leaf Procedures Procedures that call other procedures For nested call, caller needs to save on the stack: Its return address Any arguments and temporaries needed after the call Restore from the stack after the call

Non-Leaf Procedure Example C code: int fact (int n) { if (n < 1) return 1; else return n * fact(n - 1); } Argument n in \$a0 Result in \$v0

Non-Leaf Procedure Example MIPS code: fact: addi \$sp, \$sp, -8 # adjust stack for 2 items sw \$ra, 4(\$sp) # save return address sw \$a0, 0(\$sp) # save argument slti \$t0, \$a0, 1 # test for n < 1 beq \$t0, \$zero, L1 addi \$v0, \$zero, 1 # if so, result is 1 addi \$sp, \$sp, 8 # pop 2 items from stack jr \$ra # and return L1: addi \$a0, \$a0, -1 # else decrement n = n - 1 jal fact # recursive call lw \$a0, 0(\$sp) # restore original n lw \$ra, 4(\$sp) # and return address addi \$sp, \$sp, 8 # pop 2 items from stack mul \$v0, \$a0, \$v0 # multiply to get result jr \$ra # and return

What is preserved and what is not? Data and registers preserved and not preserved across a procedure call

Procedure Frame Revisiting Stack Stack not only stores the saved registers but also local variables that do not fit in registers local arrays or structures Procedure Frame (activation record) Segment of the stack containing a procedure’s saved registers and local variables Frame pointer \$fp Point to the location of the saved registers and local variables for a given procedure

Local Data on the Stack The frame pointer points to the location where the stack pointer was. Procedure frame (activation record) Used by some compilers to manage stack storage

Global Pointer Two kinds of C/C++ variables automatic Local to a procedure Discarded when the procedure exits static Global to a procedure Still exist after procedure exits Can be revisited Global Pointer \$gp Point to static area

MIPS Memory Layout 32-bit address space 0x80000000 ~ 0xFFFFFFFF Not available for user program For OS and ROM 0x10000000~0x7FFFFFFF Data Stack Dynamic Malloc() in C, New in java Static Static variables Constants 0x00400000~0x0FFFFFFF Text: Machine language of the user program 0x00000000~0x003FFFFF Reserved

Memory Layout

Stack and Heap grow toward each other

Register Summary Register 1: \$at reserved for the assembler Register 26-27: \$k0-\$k1 reserved for the OS

Summary Conditional Instructions Procedure Call Next Class Characters Starting a Program Linking

What I want you to do Review Chapter 2 Work on your assignment 3