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MS_uC / dnd / V08 4- 1 UART - Serial communic. Programming Microcontroller UART – Universal Asynchronous Receiver Transmitter 2007 32K Byte Burst Flash.

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Presentation on theme: "MS_uC / dnd / V08 4- 1 UART - Serial communic. Programming Microcontroller UART – Universal Asynchronous Receiver Transmitter 2007 32K Byte Burst Flash."— Presentation transcript:

1 MS_uC / dnd / V08 4- 1 UART - Serial communic. Programming Microcontroller UART – Universal Asynchronous Receiver Transmitter 2007 32K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte Burst Flash OTP Mem UARTI2CSPI TIMRTC EXT. Bus GPIO USB 2.0FS CAN 2.0B Enet MAC PFQ BC DMA INTR Cntl ARM966 E CORE w/DSP 96 MHz CLK Cntl ADC LVD BOD PLL JTAGETM9 STR912FW44

2 MS_uC / dnd / V08 4- 2 UART - Serial communic. Typical serial communication (low level) Full-duplex interface Device 1 Device 2 -PC -Embedded system -PC -embedded system -modem -barcode reader -printer -display (with terminal emulation software) -data logger -sensor (simple or complex) -dongle (security element) -I/O module (digital, analog, encoder, PT100) -wireless interface Transmit ReceiveTransmit Receive

3 MS_uC / dnd / V08 4- 3 UART - Serial communic. EIA-232-C pin assignments D-Sub male on PC Pin DB9 Pin DB25 SymbolDirectionText OutIn 18DCD  Data Carrier Detect 23Rx  Receive Data 32Tx  Transmit Data 420DTR  Data Terminal Ready 57GndSignal Ground 66DSR  Data Set Ready 74RTS  Request to Send 85CTS  Clear to Send 922RI  Ring Indicator RS-232-C: Radio Sector, American Standard since 1969s Male -> Stecker Female -> Buchse

4 MS_uC / dnd / V08 4- 4 UART - Serial communic. Serial data format (logical representation) 5-8 data bits Parity bit if enabled 1-2 stop bits msb lsb start 1 n 0 time lsb: least significant bit (2 0 ) msb: most significant bit (2 db-1 ) 1 bit time = 1 / baudrate Example: parity enabled, 2 stop bits Normally one Byte is sent as 8 data bits Or: One Byte is sent as 7 data bits + parity

5 MS_uC / dnd / V08 4- 5 UART - Serial communic. Hyperterminal usage Start -> Zubehör -> Kommunikation -> Hyperterminal Go offline Configure COM-Port: File->Properties Xon/Xoff: Software handshake (Exchange on..) / both sides must implement this software handshake. The sender has to stop almost immediately upon reception of Xoff character Binary data transmission is not possible. Hardware:RTS/CTS hardware handshake garantees loss-free transmission on a byte level and allows binary data transmission

6 MS_uC / dnd / V08 4- 6 UART - Serial communic. Hyperterminal communication (no handshake) a) Reset the controller. It will send a string b) Now type some characters. The controller will echo them (not hyperterminal!)  try BS character ( backspace) The terminal will interprete it properly  try LF character ( line feed, 0x0D). The cursor will move one line down  try CR charcter ( carriage return, 0x0A). The cursor jumps to column 0 View -> Serial Window -> UART #0 Serial ports may be simulated using the Simulator output and the serial window:

7 MS_uC / dnd / V08 4- 7 UART - Serial communic. UART – What is it good for? zSimple serial communication (3-wire) zMultiple physical interfaces: yEIA-232 Peer-to-peer (former RS-232-C 1969). Gnd based (-15..- 3,3..15 V) yEIA-485 Party Line, multi-point link (SCSI, ISDN,... yEIA-422 : Balanced lines, no ground link (D+/D-) on drivers up to 1'000m @ 100 kbps. Point-to-point or multi-drop. 0-5 V. Twisted-pair cable zEasy setup zDirect programming zByte level only zUSB will not replace cheap and simple communications EIA: Electronic Industry Alliance

8 MS_uC / dnd / V08 4- 8 UART - Serial communic. Hardware flow control RTS will be switched on and off by programmable receiv FIFO watermarks

9 MS_uC / dnd / V08 4- 9 UART - Serial communic. UART features (1/3) zSeparate 16x8 Transmit and 16x12 Receive FIFO zProgrammable FIFO disabling for 1-byte depth zProgrammable Baud rate generator : yBaud rate = UARTCLK / (16 × BRR) zStandard Asynchronous communication bits (start, stop and parity) zIndependent masking of transmit FIFO, receive FIFO, receive timout, modem status, and error condition interrupts zFalse start bit detection zLine Break Generation and Detection zSupport for Modem Control Functions CTS, DCD, DSR, RTS, DTR, and RI zProgrammable hardware flow control FIFO: First In First Out sequential, buffer structure

10 MS_uC / dnd / V08 4- 10 UART - Serial communic. UART features (2/3) zProgrammable word length : y5 bits, 6 bits, 7 bits, 8 bits zProgrammable Stop bits : y1 Stop bit, 2 Stop bits zEven, odd, stick, or no-parity bit generation and detection zSupport for Direct Memory Access (DMA) zSupport for an IrDA Serial Interface (SIR) protocol EnDec zParity control zLoop Back zSupport baud rates of up to 460.8 Kbits / second subject to UARTCLK reference clock frequency

11 MS_uC / dnd / V08 4- 11 UART - Serial communic. UART features (3/3) z11 Interrupt sources : yOverrun error detected yBreak Error yParity Error yFraming Error yReceive Timeout yData Transmit yData Receive yModem Data Set Ready (DSRMIM) yModem Data Carrier Detect (DCD) yModem Clear to Send (CTS) yModem Ring Indicator (RI)

12 MS_uC / dnd / V08 4- 12 UART - Serial communic. UART Block diagram Ref manual figure 74

13 MS_uC / dnd / V08 4- 13 UART - Serial communic. UART register map

14 MS_uC / dnd / V08 4- 14 UART - Serial communic. Fractional Baud Rate generator  Every baud rate generator has errors. Check the tolerance! BRCLK: baud rate clock

15 MS_uC / dnd / V08 4- 15 UART - Serial communic. UART configuration [Peripherals -> UART]

16 MS_uC / dnd / V08 4- 16 UART - Serial communic. Pin connections of UART STR91x ARM966 manual 12274.pdf, 4.1 pin functions page 36 P3.0 UART0_RxD Alternate Input 1 P3.1 UART0_TxD Alternate Output 2  Use COM1 of MCBSTR9. Which port?

17 MS_uC / dnd / V08 4- 17 UART - Serial communic.


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