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MS_uC / fue1 / V01 4- 1 UART - Serial communic. Programming Microcontroller USART Universal Synchronous/Asynchronous Receiver Transmitter Autumn 2012.

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Presentation on theme: "MS_uC / fue1 / V01 4- 1 UART - Serial communic. Programming Microcontroller USART Universal Synchronous/Asynchronous Receiver Transmitter Autumn 2012."— Presentation transcript:

1 MS_uC / fue1 / V UART - Serial communic. Programming Microcontroller USART Universal Synchronous/Asynchronous Receiver Transmitter Autumn 2012

2 MS_uC / fue1 / V UART - Serial communic. Typical serial communication (low level) Full-duplex interface Device 1 (Data Set) Device 2 (Data Terminal) -PC -Embedded system -PC -embedded system -modem -barcode reader -printer -display (with terminal emulation software) -data logger -sensor (simple or complex) -dongle (security element) -I/O module (digital, analog, encoder, PT100) -wireless interface Transmit ReceiveTransmit Receive

3 MS_uC / fue1 / V UART - Serial communic. RS-232-C pin assignments D-Sub male on PC Pin DB9 Pin DB25 SymbolDirectionText OutIn 18DCD  Data Carrier Detect 23Rx  Receive Data 32Tx  Transmit Data 420DTR  Data Terminal Ready 57GndSignal Ground 66DSR  Data Set Ready 74RTS  Request to Send 85CTS  Clear to Send 922RI  Ring Indicator RS-232-C: Radio Sector, American Standard since 1969s EIA: Electronic Industry Alliance Male -> Stecker Female -> Buchse

4 MS_uC / fue1 / V UART - Serial communic. Serial data format (logical representation) 5-8 data bits Parity bit if enabled 1-2 stop bits msb lsb start 1 n 0 time lsb: least significant bit (2 0 ) msb: most significant bit (2 db-1 ) 1 bit time = 1 / baud rate Example: parity enabled, 2 stop bits Normally one Byte is sent as 8 data bits Or: One Byte is sent as 7 data bits + parity

5 MS_uC / fue1 / V UART - Serial communic. Hyperterminal usage Start -> Zubehör -> Kommunikation -> Hyperterminal Go offline Configure COM-Port: File->Properties Xon/Xoff: Software handshake (Exchange on..) / both sides must implement this software handshake. The sender has to stop almost immediately upon reception of Xoff character Binary data transmission is not possible. Hardware:RTS/CTS hardware handshake guarantees loss-free transmission on a byte level and allows binary data transmission

6 MS_uC / fue1 / V UART - Serial communic. UART – What is it good for? zSimple serial communication (3-wire) zMultiple physical interfaces: yEIA-232 Peer-to-peer (former RS-232-C 1969). Gnd based ( ,3..15 V) yEIA-485 Party Line, multi-point link (SCSI, ISDN,... yEIA-422 : Balanced lines, no ground link (D+/D-) on drivers up to 100 kbps. Point-to-point or multi-drop. 0-5 V. Twisted-pair cable zEasy setup zDirect programming zByte level only zUSB will not replace cheap and simple communications EIA: Electronic Industry Alliance

7 MS_uC / fue1 / V UART - Serial communic. EIA-485 Party Line, multi-point link

8 MS_uC / fue1 / V UART - Serial communic. Hardware flow control nRTS will be switched on and off by programmable receiver DMA watermarks

9 MS_uC / fue1 / V UART - Serial communic. UART features (1/3) zFull duplex, asynchronous communications zNRZ standard format (Mark/Space) zFractional baud rate generator systems yA common programmable transmit and receive baud rates up to 4.5 MBits/s zProgrammable data word length (8 or 9 bits) zConfigurable stop bits - support for 1 or 2 stop bits zLIN (Local Interconnection Network) Master Synchronous Break send capability and LIN slave break detection capability y13-bit break generation and 10/11 bit break detection when USART is hardware configured for LIN zTransmitter clock output for synchronous transmission zIrDA SIR Encoder Decoder ySupport for 3/16 bit duration for normal mode zSmartcard Emulation Capability yThe Smartcard interface supports the asynchronous protocol Smartcards as defined in ISO standards y0.5, 1.5 Stop Bits for Smartcard operation

10 MS_uC / fue1 / V UART - Serial communic. UART features (2/3) zSingle wire half duplex communication zConfigurable multi buffer communication using DMA (direct memory access) yBuffering of received/transmitted bytes in reserved SRAM using centralized DMA zSeparate enable bits for Transmitter and Receiver zTransfer detection flags yReceive buffer full yTransmit buffer empty yEnd of Transmission flags zParity control yTransmits parity bit yChecks parity of received data byte zFour error detection flags yOverrun error yNoise error yFrame error yParity error

11 MS_uC / fue1 / V UART - Serial communic. UART features (3/3) zTen interrupt sources with flags: yCTS changes yLIN break detection yTransmit data register empty yTransmission complete yReceive data register full yIdle line received yOverrun error yFraming error yNoise error yParity error zMultiprocessor communication - enter into mute mode if address match does not occur zWake up from mute mode (by idle line detection or address mark detection) zTwo receiver wakeup modes: Address bit (MSB, 9th bit), Idle line

12 MS_uC / fue1 / V UART - Serial communic. UART Block diagram Ref. RM0008 Reference manual, figure 277

13 MS_uC / fue1 / V01 UART register boundary addresses UART - Serial communic. Ref. RM0008 Reference Manual, table 3 Boundary addressPeripheralBus 0x4000_4400 – 0x4000_47FF USART2 APB1 0x4000_4800 – 0x4000_4BFF USART3 APB1 0x4000_4C00 – 0x4000_4FFF USART4 APB1 0x4000_5000 – 0x4000_53FF USART5 APB1 0x4001_3800 – 0x4001_3BFF USART1 APB2

14 MS_uC / fue1 / V UART - Serial communic. UART register offset addresses Ref. RM0008 Reference Manual, table 198

15 MS_uC / fue1 / V UART - Serial communic. UART register description (1/4) zStatus register (USART_SR) yCTS: Clear to send yTXE: Transmit data register empty yTC: Transmission complete yRXNE: Read data register not empty yNE: Noise error yFE: Frame error yPE: Parity error zData register (USART_DR) yContains the received or transmitted data character, depending it is read from or written to Ref. RM0008 Reference Manual, chapter 27.6

16 MS_uC / fue1 / V01 UART register description (2/4) zControl register 1 (USART_CR1) yUE: USART enable yM: Word length yPCE: Parity control enable yPS: Parity selection yPEIE: Parity interrupt enable yTXEIE: TXE interrupt enable yTCIE: Transmission complete interrupt enable yRXNEIE: RXNE interrupt enable yTE: Transmitter enable yRE: Receiver enable UART - Serial communic.

17 MS_uC / fue1 / V01 UART register description (3/4) zControl register 2 (USART_CR2) ySTOP: Stop bits yCLKEN: Clock enable yCPOL: Clock polarity yCPHA: Clock phase UART - Serial communic.

18 MS_uC / fue1 / V01 UART register description (4/4) zControl register 3 (USART_CR3) yCTSIE: CTS interrupt enable yCTSE: CTS enable yRTSE: RTS enable yDMAT: DMA enable transmitter yDMAR: DMA enable receiver yHDSEL: Half-duplex selection yEIE: Error interrupt enable UART - Serial communic.

19 MS_uC / fue1 / V UART - Serial communic. Fractional Baud Rate generator zThe Baud rate for the receiver and transmitter (Rx & Tx) are both set to the same value y zUSARTDIV is an unsigned fixed point number that is coded on the USART_BRR register

20 MS_uC / fue1 / V01 Error calculation for programmed baud rates UART - Serial communic. Ref. RM0008 Reference Manual, table 192

21 MS_uC / fue1 / V UART - Serial communic. Pin connections of USART2 RM0008 Reference manual, Table 53 zUSART2 port functional description yPD5: Alternate push-pull yPD6: Input floating zUSART2 port remap yPD5 USART_TX yPD6 USART_RX


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